Cypress MB91460, Руководство пользователя

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FR, MB91460, FR Clocks
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Document No. 002-05317 Rev. *C 18
7 Clocks Example
Example for Clocks
7.1 Starting Clock Modulator
The following example demonstrates how to start the clock modulator with the PLL reference frequency (CLKPLL) of
48 MHz. The modulation resolution is chosen as 3 and the modulation degrees as 1. Hence the min frequency of
modulated clock (CLKMOD) is 45.18 MHz and max frequency is 51.2 MHz.
7.2 Stopping Clock Modulator
The following example demonstrates how to stop the clock modulator.
/* SAMPLE CODE */
/*---------------------------------------------------------------------------*/
. . .
// set PLL clock to 48 MHz
CMCR_PDX = 1;
// power up clock modulator
for(i=0; i<20; i++)
// wait for clock modulator’s startup time of 6 μs
CMPR = 0x027F;
// k = 1 N = 3 c = 31
// min freq – 45.18 MHz, max freq – 51.2 MHz
CMCR_FMOD = 1; // modulation enable
while (1 != CMCR_FMOD_RUN); // wait till modulator calibration done
. . .
/* SAMPLE CODE */
/*---------------------------------------------------------------------------*/
. . .
CMCR_FMOD = 0; // modulation disable
while (0 != CMCR_FMOD_RUN); // wait till modulator is disabled
CMCR_PDX = 0;
// power down clock modulator
. . .