FR, MB91460, FR Clocks
Document No. 002-05317 Rev. *C
11
4
Using the start.asm
The correct setting of these registers can be performed easily by using the Fujitsu provided file
start.asm
.
Set the parameter
CLOCK_SPEED
to the desired value depending upon the required CLKB, CLKP and External
Clock and CAN clock frequency.
There are different default configurations available, where all necessary settings for clocks and the related registers
are made. If the
CLOCK_SPEED
is set to PLL_4MHZ__CPU__64MHZ_PER_16MHZ_EXT_32MHZ_CAN_16MHZ
than it means:
Main oscillation
= 4 MHz, PLL is activated
CPU clock (CLKB)
= 64 MHZ
Peripheral clock (CLKP) = 16 MHZ
Ext. bus clock (CLKT)
= 32 MHZ
CAN clock (CLKCAN) = 16 MHz, using PLLx
Beside these configurations, there is the possibility to define a user configuration in the chapter 5 "Definition of
Configurations". Set the parameter
CLOCK_SPEED
to
CLOCK_USER
and the parameters mentioned in chapter
5.1 CLOCKSPEED == CLOCK_USER to desired values.
; No clock settings
#set NO_CLOCK 0x01
; Sub-oscillation input: 32 kHz
#set SUB_32KHZ_CPU__32KHZ_PER_32KHZ_EXT_32KHZ_CAN__2MHZ 0x11
; Oscillation input: 4 MHz
#set MAIN_4MHZ_CPU___2MHZ_PER__1MHZ_EXT__1MHZ_CAN__2MHZ 0x21
#set PLL_4MHZ__CPU__48MHZ_PER_16MHZ_EXT_24MHZ_CAN_16MHZ 0x22
#set PLL_4MHZ__CPU__64MHZ_PER_16MHZ_EXT_32MHZ_CAN_16MHZ 0x23
#set PLL_4MHZ__CPU__80MHZ_PER_20MHZ_EXT_27MHZ_CAN_20MHZ 0x24
#set PLL_4MHZ__CPU__80MHZ_PER_20MHZ_EXT_40MHZ_CAN_20MHZ 0x25
#set PLL_4MHZ__CPU__96MHZ_PER_16MHZ_EXT_48MHZ_CAN_16MHZ 0x26
#set PLL_4MHZ__CPU_100MHZ_PER_20MHZ_EXT_50MHZ_CAN_20MHZ
; MB91461R only: Oscillation input: 10 MHz
#set PLL_10MHZ_CPU__60MHZ_PER_20MHZ_EXT_30MHZ_CAN_20MHZ 0x41
; MB91461R only: Oscillation input: 20 MHz
#set PLL_20MHZ_CPU__60MHZ_PER_20MHZ_EXT_30MHZ_CAN_20MHZ 0x51
; User settings
#set CLOCK_USER 0x61
;
#set CLOCKSPEED PLL_4MHZ__CPU__64MHZ_PER_16MHZ_EXT_32MHZ_CAN_16MHZ
