Cypress Semiconductor FLEx36 CYD01S36V, Техническое описание

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CYD01S36V
CYD02S36V/36VA/CYD04S36V
CYD09S36V/CYD18S36V
Document Number: 38-06076 Rev. *G Page 3 of 28
Pin Configurations
Figure 1. Pin Diagram - 256-Ball FBGA (Top View)
CYD01S36V/CYD02S36V/36VA/CYD04S36V/CYD09S36V/CYD18S36V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A
DQ32L DQ30L DQ28L DQ26L DQ24L DQ22L DQ20L DQ18L DQ18R DQ20R DQ22R DQ24R DQ26R DQ28R DQ30R DQ32R
B
DQ33L DQ31L DQ29L DQ27L DQ25L DQ23L DQ21L DQ19L DQ19R DQ21R DQ23R DQ25R DQ27R DQ29R DQ31R DQ33R
C
DQ34L DQ35L
RETL
[2,3]
INTL
NC
[2,5]
NC
[2,5]
REVL
[2,4]
TRST
[2,5]
MRST
NC
[2,5]
NC
[2,5]
NC
[2,5]
INTR
RETR
[2,3]
DQ35R DQ34R
D
A0L A1L
WRPL
[2,3]
VREFL
[2,4]
FTSELL
[2,3]
LOWSP
DL [2,4]
VSS VTTL VTTL VSS
LOWSP
DR [2,4]
FTSEL
R [2,3]
VREFL
[2,4]
WRPR
[2,3]
A1R A0R
E
A2L A3L
CE0L
[11]
CE1L
[10]
VDDIOL VDDIOL VDDIOL VCORE VCORE VDDIO
R
VDDIO
R
VDDIO
R
CE1R
[10]
CE0R
[11]
A3R A2R
F
A4L A5L
CNTINT
L [12]
BE3L VDDIOL VSS VSS VSS VSS VSS VSS
VDDIO
R
BE3R
CNTINT
R [12]
A5R A4R
G
A6L A7L
BUSYL
[2,5]
BE2L
REV
L
[2,3]
VSS VSS VSS VSS VSS VSS
VDDIO
R
BE2R
BUSYR
[2,5]
A7R A6R
H
A8L A9L CL VTTL VCORE VSS VSS VSS VSS VSS VSS VCORE VTTL CR A9R A8R
J
A10L A11L VSS
PORTS
TD1L[2,
4]
VCORE VSS VSS VSS VSS VSS VSS VCORE
PORTS
TD1R[2,
4]
VSS A11R A10R
K
A12L A13L OEL BE1L VDDIOL VSS VSS VSS VSS VSS VSS
VDDIO
R
BE1R OER A13R A12R
L
A14L
A15L
[6]
ADSL
[11]
BE0L VDDIOL VSS VSS VSS VSS VSS VSS
VDDIO
R
BE0R
ADSR
[11]
A15R
[6]
A14R
M
A16L
[7]
A17L
[8]
R/WL
REVL
[2,4]
VDDIOL VDDIOL VDDIOL VCORE VCORE VDDIO
R
VDDIO
R
VDDIO
R
REVR
[2,4]
R/WR
A17R
[8]
A16R
[7]
N
A18L
[9]
A19L
[2,5]
CNT/M
SKL [10]
VREFL
[2,4]
PortST
D0L
[2,4]
READY
L [2,5]
REV
L
[2,3]
VTTL VTTL
REV
R
[2,3]
READY
R [2,5]
PortST
D0R
[2,4]
VREFR
[2,4]
CNT/M
SKR
[10]
A19R
[2,5]
A18R
[9]
P
DQ16L DQ17L
CNTEN
L [11]
CNTRS
TL [10]
NC
[2,5]
NC
[2,5]
TCK TMS TDO TDI
NC
[2,5]
NC
[2,5]
CNTRS
TR [10]
CNTEN
R [11]
DQ17R DQ16R
R
DQ15L DQ13L DQ11L DQ9L DQ7L DQ5L DQ3L DQ1L DQ1R DQ3R DQ5R DQ7R DQ9R DQ11R DQ13R DQ15R
T
DQ14L DQ12L DQ10L DQ8L DQ6L DQ4L DQ2L DQ0L DQ0R DQ2R DQ4R DQ6R DQ8R DQ10R DQ12R DQ14R
Notes
2. This ball represents a next generation Dual-Port feature. For more information about this feature, contact Cypress Sales.
3. Connect this ball to VDDIO. For more information about this next generation Dual-Port feature contact Cypress Sales.
4. Connect this ball to VSS. For more information about this next generation Dual-Port feature, contact Cypress Sales.
5. Leave this ball unconnected. For more information about this feature, contact Cypress Sales.
6. Leave this ball unconnected for 32K x 36configuration.
7. Leave this ball unconnected for a 64K x 36, 32K x 36 configurations.
8. Leave this ball unconnected for a 128K x 36, 64K x 36 and 32K x 36 configurations.
9. Leave this ball unconnected for a 256K x 36, 128K x 36, 64K x 36, and 32K x 36 configurations.
10. These balls are not applicable for CYD18S36V device. They need to be tied to VDDIO.
11. These balls are not applicable for CYD18S36V device. They need to be tied to VSS.
12. These balls are not applicable for CYD18S36V device. They need to be no connected.
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