7. BIOS Setup
PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV
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Table 7.4. POST Codes
< 3 / 5 >
36h
Not used
37h
Not used
38h
Not used
39h
Not used
3Ah
Not used
3Bh
Not used
3Ch
Test 8254.
3Dh
Not used
3Eh
Test 8259 interrupt mask bit for channel 1.
3Fh
Not used
40h
Test 8259 interrupt mask bit for channel 2.
41h
Not used
42h
Not used
43h
Test 8259 functions.
44h
Not used
45h
Not used
46h
Not used
47h
Initialize EISA slots.
48h
Not used
49h
1. Calculate total memory size by checking last DWORD in each 64K page.
2. Set write allocation for AMD K5 CPU.
4Ah
Not used
4Bh
Not used
4Ch
Not used
4Dh
Not used
4Eh
1. Set MTRR for M1 CPU.
2. Initialize L2 cache for P6 class CPU and set applicable cache range to CPU.
3. Initialize APIC for P6 class CPU.
4. Set the available cache range for each CPU in a MP platform and adjust available cache size
downwards.
4Fh
Not used
50h
Initialize USB.
51h
Not used
52h
Test all memory. (Zero-clear all extended memory.)
53h
Not used
54h
Not used
55h
Display number of processors. (For a multi-processor platform)
56h
Not used
57h
1. Display PnP logo.
2. Initialize initial ISA PnP.
Assign CSN to all ISA PnP devices.
58h
Not used
59h
Initialize all common virus prevention code combinations.
5Ah
Not used
5Bh
(Optional function)
Display a message requesting that AWDFLASH.EXE be input from the FDD. (Option)
POST (hex)
Description
Содержание PC-686BX(NLX)-LV
Страница 7: ...vi PC 686BX NLX LV PC 686BX NLX LVV ...
Страница 19: ...2 Specifications 12 PC 686BX NLX LV PC 686BX NLX LVV ...
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Страница 101: ...7 BIOS Setup 94 PC 686BX NLX LV PC 686BX NLX LVV ...