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SA70m01
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Signal Descriptions and Pinout Tables
The following section describes the signals found on SMARC
®
module’s edge fingers. The pinout of the module complies with SMARC
Specification 2.1.
The table below describes the terminology used in this section. The PU/PD column indicates if a pull-up or pull-down resistor has been used.
If the field entry area in this column for the signal is empty, then no pull-up or pull-down resistor has been implemented. The “#” symbol at the
end of the signal name indicates that the active or asserted state occurs when the signal is at a low voltage level.
Note
Not all the signals described in this section are available on all conga-SA7 variants. Use the article number of the module and refer to the
“conga-SA7 Options Information” table in section 1 to determine the options available on the module.
Table 12 Signal Tables Terminology Descriptions
Term
Description
I
Input to the module
O
Output from the module
O OD
Open drain output from the module
I OD
Open drain input to the module, with pull-up on module
OD
Open drain
I/O
Bi-directional Input/Output Pin
PU(i)/PD(i)
Pull-up or pull-down resistor internal to the SoC or transceiver
VDD_IN
Signal may be exposed to module input voltage range (4.75 to 5.25V)
CMOS
Logic input or output with 3.3 V signal level
GBe MDI
Differential analog signaling for Gigabit Media Dependent Interface
LVDS DP
LVDS signaling for DisplayPort devices
LVDS D-PHY
LVDS signaling for MIPI CSI-2 camera and DSI display interfaces
LVDS LCD
LVDS signaling for LVDS LCD displays
LVDS PCIE
LVDS signaling for PCIe interfaces
LVDS SATA
LVDS signaling for SATA interfaces
TMDS
LVDS signaling for HDMI display interfaces
USB
DC coupled differential signaling for traditional (non-Superspeed) USB signals
USB SS
LVDS signaling for SuperSpeed USB signals
PCIE
PCI Express differential pair signals. In compliance with the PCI Express Base Specification 2.0
USB VBUS 5V
5V tolerant input for USB VBUS detection
