Chassis Plans JXT6966, Техническое описание оборудования

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JXT6966 / JXTS6966 Technical Reference Specifications
1-7 CHASSIS PLANS
Processor

Intel® Xeon® C5500 Series Processor – Nehalem-EP micro-architecture (Jasper Forest)r

Processor plugs into an LGA1366 socket
Serial Interconnect Interface
PCI Express® 2.0 and 1.1 compatible
Data Path
DDR3-1333 Memory - 72-bit (per channel)
Serial Interconnect Speeds
PCI Express 2.0 – 5.0GHz per lane
PCI Express 1.1 - 2.5GHz per lane
Intel® Quick Path Interconnect Supported Speeds Between CPUs
The Intel
®
3420 PCH supports 4.8GT/s or 5.86GT/s between processors. The speed of the Intel
®
QPI
depends on the type of CPU installed. The Quick Path Interconnect enables both processor-to-processor
resource sharing and fast data transfers between CPUs and the Intel
®
3420 PCH.
Intel® Direct Media Interface (DMI)Speed Between Processor and Intel® 3420 PCH
This full duplex interface operates at 10Gb/s in each direction and provides data communications between
the PCH and processor. On a dual-processor, JXT6966 the first CPU connects to the PCH and the second
CPU feeds its information to the PCH via the first CPU’s DMI link.
Memory Interface
Three DDR3-1333MHz memory channels per processor; peak memory interface bandwidth is 32GB/s
when using PC3-10600 Mini-DIMMs.
DMA Channels
The SHB is fully PC compatible with seven DMA channels, each supporting type F transfers.
Interrupts
The SHB is fully PC compatible with interrupt steering for PCI plug and play compatibility.
Bios (Flash)
The JXT boards use an Aptio
® 4.x
BIOS from American Megatrends Inc. (AMI). The BIOS features built-
in advanced CMOS setup for system parameters, peripheral management for configuring on-board
peripherals and other system parameters. The BIOS resides in a 32Mb Atmel
®
AT25DF321SU SPI Serial
EEPROM (SPI Flash). The BIOS may be upgraded from a USB thumb drive storage device by pressing
<Ctrl> + <Home> immediately after reset or power-up with the USB device installed in drive A:. Custom
BIOSs are available.
Cache Memory
The processors include either a 4MB or 8MB last-level cache (LLC) memory capacity that is equally
shared between all of the processor cores on the die.