Challenger VKFCSD22IR Series, Руководство пользователя

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10. 5 DIP switch setup
Baud rate
SWITCH NUMBER
1 2 3 4 5
1 0 0 0 0
0 0 0 1 0
PROTOCOL
FACTORY
PELCO
ERNITEC
VCL
MOLYNX
VICON
SANTACHI
PANASONIC
SAMSUNG
DIAMOND
KALATEL
LILIN
VIDO B02
HUNDA
(Bit)
0 1 0 0 0
1 0 0 1 0
1 1 0 0 0
0 1 0 1 0
0 0 1 0 0
1 1 0 1 0
1 0 1 0 0
0 0 0 0 0
0 1 1 0 0
0 0 1 1 0
1 1 1 0 0
1 0 1 1 0
RESERVED OTHERS
Switch number (SW2)
6 7
(Bit)
There are two DIP switches on the main
board of the dome (see picture 9.4-3). SW1 is
for dome address setting, and SW2 is for dome
protocol and baud rate setting.
10. 5. 1 Baud rate setup
（
SW2
）
Please according to "Appdienx RS485 Bus
Basic knowledge", to check whether baud rate
is satisfied with the demand of transmission
distance.
In the following list, 1 set DIP as ON ,
and set DIP as OFF .
" " " "
"0" " "
10. 5. 2 Protocol setup
（
SW2
）
(FACTORY PROTOCOL)
2400bps
4800bps
9600bps
19200bps
0 0
1 0
0 1
1 1
（
SW2
）
9. 5. 3 ID setting
（
SW1
）
In a system, a decoder includes speed dome camera and common decoder, there aren't the
same ID between them. The ID switch in decoder and the ID setting of the dome as follow, in the
sheet,"1" set DIP switch as "NO", "0" set DIP switch as OFF.
3 7
S w i t c h n u m b e r
ID
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
25
26
27
28
29
30
31
32
20
21
22
23
24
1 1 1 1 1 0 0 0
0 0 0 0 0 1 0 0
(Bit)
1 2 3 4 5 6 7 8
0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0
1 1 0 0 0 0 0 0
0 0 1 0 0 0 0 0
1 0 1 0 0 0 0 0
0 1 1 0 0 0 0 0
1 1 1 0 0 0 0 0
0 0 0 1 0 0 0 0
1 0 0 1 0 0 0 0
0 1 0 1 0 0 0 0
1 1 0 1 0 0 0 0
0 0 1 1 0 0 0 0
1 0 1 1 0 0 0 0
0 1 1 1 0 0 0 0
1 1 1 1 0 0 0 0
0 0 0 0 1 0 0 0
1 0 0 0 1 0 0 0
0 1 0 0 1 0 0 0
1 1 0 0 1 0 0 0
0 0 1 0 1 0 0 0
1 0 1 0 1 0 0 0
0 1 1 0 1 0 0 0
1 1 1 0 1 0 0 0
0 0 0 1 1 0 0 0
1 0 0 1 1 0 0 0
0 1 0 1 1 0 0 0
1 1 0 1 1 0 0 0
0 0 1 1 1 0 0 0
1 0 1 1 1 0 0 0
0 1 1 1 1 0 0 0
S w i t c h n u m b e r
ID
1 2 3 4 5 6 7 8
0 0 1 1 0 1 0 0
1 0 1 1 0 1 0 0
0 1 1 1 0 1 0 0
1 1 1 1 0 1 0 0
0 0 0 0 1 1 0 0
1 0 0 0 1 1 0 0
0 1 0 0 1 1 0 0
1 1 0 0 1 1 0 0
0 0 1 0 1 1 0 0
1 0 1 0 1 1 0 0
0 1 1 0 1 1 0 0
1 1 1 0 1 1 0 0
0 0 0 1 1 1 0 0
1 0 0 1 1 1 0 0
0 1 0 1 1 1 0 0
1 1 0 1 1 1 0 0
0 0 1 1 1 1 0 0
1 0 1 1 1 1 0 0
0 1 1 1 1 1 0 0
1 1 1 1 1 1 0 0
0 0 0 0 0 0 1 0
1 0 0 0 0 0 1 0
0 1 0 0 0 0 1 0
1 1 0 0 0 0 1 0
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
(Bit)
(Sw1) (Sw1)
33
34
1 0 0 0 0 1 0 0
0 1 0 0 0 1 0 0
1 1 0 0 0 1 0 0
0 0 1 0 0 1 0 0
1 0 1 0 0 1 0 0
0 1 1 0 0 1 0 0
1 1 1 0 0 1 0 0
0 0 0 1 0 1 0 0
1 0 0 1 0 1 0 0
0 1 0 1 0 1 0 0
1 1 0 1 0 1 0 0
35
36
37
38
39
40
41
42
43
Factory defaults
set as debug address
3 8
Appendix
Appendix