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27/09/2002 

V560 User Manual

 

24 

5.  MOD. V560 INTERRUPTER 

 
 

5.1. INTERRUPTER  CAPABILITY 

 

The Mod. V560 houses a VME RORA INTERRUPTER  D08(o) type. This means that: 
 

•

 it responds to 8 bit, 16 bit and 32 bit interrupt acknowledge cycles providing an 8-bit 

STATUS/ID on the VME data lines D00..D07; 

 

•

 it removes its interrupt request when some on board registers are accessed by a VME 

MASTER (RORA:  Release On Register Access). 

 

5.2. INTERRUPT  LEVEL 

 
The interrupt level corresponds to the value stored in the Interrupt Level & VETO

 

register <2..0>. the 

register is available at the VME address Base + % 06. 
 

 

5.3. INTERRUPT  STATUS/ID 

 
The interrupt STATUS/ID is 8 bit wide, and it is contained in the Interrupt Vector register<7..0> 
(address Base + % 04). 

 

5.4. INTERRUPT REQUEST RELEASE 

 

The V560 INTERRUPTER removes its interrupt request in these cases: 
 

•

  by accessing the address Base + % 0C (Clear VME interrupt); 

 

•

  by accessing the address Base + % 50 (Clear Scales); 

 

•

  by pushing the front panel push-button "MAN CLR"; 

 

•

  by generating the VME signal SYSRES. 

 

5.5. ENABLE/DISABLE INTERRUPT GENERATION 

 

It is possible to enable/disable the Mod. V560 interrupt generation in the following way. 
 

enable:  

by accessing  the address Base + % 08 (Enable VME Interrupt); 

 
disable:  

by accessing  the address Base + % 0A (Disable VME Interrupt); 

 
 

 

by accessing  the address Base + % 50 (Clear Scales); 

 
 

 

by pushing the front panel push-button "MAN CLR"; 

 
   

 

by generating the VME signal SYSRES. 

5.6. INTERRUPT  SEQUENCE 

 

If the VME interrupt generation is enabled (access to the address Base + % 08): 

{ 

Содержание V560 Series

Страница 1: ...Technical Information Manual MOD V560 series 27 September 2002 Revision n 1 16 CHANNEL SCALERS...

Страница 2: ...he User accident or any abnormal conditions or operations CAEN declines all responsibility for damages or injuries caused by an improper use of the Modules due to negligence on behalf of the User It i...

Страница 3: ...TION 14 3 8 V560 POWER SELECTION 14 4 VME INTERFACE 16 4 1 ADDRESSING CAPABILITY 16 4 2 DATA TRANSFER CAPABILITY 16 4 3 MODULE IDENTIFIER WORDS 19 4 4 SCALE STATUS REGISTER 19 4 5 SCALE INCREMENT 20 4...

Страница 4: ...ternal NIM signals indicated on the front panel connectors with VETO CLEAR TEST VETO INHIBIT an input signal sent through this connector disables the counting CLEAR FAST CLEAR an input signal present...

Страница 5: ...1 clock inhibit clear IDENTIFIER INPUT 2n 1 INPUT 2n MSB MSB OE OE VME INTERFACE SCALE STATUS REQUEST REG Sn Enable n INTERRUPTER IRQ Req n INT LEVEL STATUS ID Enable to other sections SECTION n Clea...

Страница 6: ...input signal No 2 CLEAR LEMO 00 type 50 impedance two bridge connectors for daisy chaining for the CLEAR input signal No 2 VETO LEMO 00 type 50 impedance two bridge connectors for daisy chaining for t...

Страница 7: ...ELS std differential ECL level 110 impedance max frequency 100 MHz min width 5 ns min time interval between two pulses 5 ns VETO std NIM level high impedance min width 50 ns it must precede the input...

Страница 8: ...CALER 16 CH Mod V560E TEST input VETO input Inputs 8 15 Inputs 0 7 CLEAR input Manual Clear pushbutton VME selected LED SCALER 16 CH Mod V560E IN 8 1 5 E A R L C T 0 E V S T E T A C T D K MAN CLR IN 0...

Страница 9: ...se address selection Rotary switches POWER SELECTION JP2 JP8 sect 7 JP10 sect 6 JP9 sect 5 JP7 sect 4 JP4 sect 3 JP6 sect 2 JP5 sect 1 JP3 sect 0 VME P1 connector VME P2 connector Paux connector for C...

Страница 10: ...the corresponding input If the section n is configured as two 32 bit scales the clock of the channel 2n is the external input 2n the clock of the channel 2n 1 is the external input 2n 1 If the section...

Страница 11: ...JP3 sect 0 Fig 3 1 Mod V560 jumper settings Section 64 bit scale External Input Changeover sw number MSB LSB of the scale location 0 ch 0 ch 1 input 1 JP3 1 ch 2 ch 3 input 3 JP5 2 ch 4 ch 5 input 5 J...

Страница 12: ...e scale becomes true i e the 32th bit of the even channel 3 3 FRONT PANEL SIGNALS Some operations can be performed by three external NIM signals indicated on the front panel connectors with VETO CLEAR...

Страница 13: ...54 see 4 6 3 5 SCALE CLEAR All the scales are cleared in the following cases by sending a NIM signal through one of the two CLEAR connectors located on the front panel by pushing the front panel push...

Страница 14: ...crates The 5 2 V power is generated on board from the standard voltage 12V provided on the VME backplane JP2 must be located in the 5 EXT position CERN VMEbus crate Type V430 The 5 2 V power is provi...

Страница 15: ...27 09 2002 V560 User Manual 15 VMEbus crate type V430 position 5 EXT Standard crates position 5 INT Component side of the board JP2 POWER SELECTION settings Fig 3 1 Mod V560 JP2 settings 5 INT 5 EXT...

Страница 16: ...y switches housed on two piggy back boards plugged into the main printed circuit board see Fig 4 1 The Base Address can be selected in the range 00 0000 FF FF00 A24 mode 0000 0000 FFFF FF00 A32 mode T...

Страница 17: ...09 2002 V560 User Manual 17 Base address bit 31 28 Base address bit 27 24 Base address bit 23 20 Base address bit 19 16 Base address bit 15 12 Base address bit 11 8 Fig 4 1 Mod V560 Base address setti...

Страница 18: ...clear Counter 15 Counter 14 Counter 13 Counter 12 Counter 11 Counter 10 Counter 9 Counter 8 Counter 7 Counter 6 Counter 5 Counter 4 Counter 3 Counter 2 Counter 1 Counter 0 read only read write read wr...

Страница 19: ...of module 0000011000 b The word located at the address Base FE identifies the single module through the module s serial number and any change in the hardware for example the use of faster logic will b...

Страница 20: ...address 54 r w A VME access read or write to the address Base 52 sets the VME VETO the scales are not able to count A VME access read or write to the address Base 54 clears the VME VETO If no externa...

Страница 21: ...disposition on the data lines during Long Word read cycles 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ADDRESS Base 10 Base 12 Base 14 C o u n t e r 0 31 16 Base 16 Base 18 Base 1A C o u n t e r 0 15 0 C o...

Страница 22: ...Enable Request Sect 1 Enable Request Sect 2 Enable Request Sect 3 Enable Request Sect 4 Enable Request Sect 5 Enable Request Sect 6 Enable Request Sect 7 Enable Request 0 1 2 3 4 5 6 7 8 9 10 11 12 13...

Страница 23: ...n the channel has been read If the module was able to count the counter value previously read has been latched on fly and may be not correct During word cycle the VETO value is latched during the acce...

Страница 24: ...and it is contained in the Interrupt Vector register 7 0 address Base 04 5 4 INTERRUPT REQUEST RELEASE The V560 INTERRUPTER removes its interrupt request in these cases by accessing the address Base...

Страница 25: ...owledge cycle it places on the VME data lines D00 D07 the STATUS ID it is the byte contained in the 8 LSB of the Interrupt vector register address Base 04 if a VME MASTER accesses read or write the ad...

Страница 26: ...27 09 2002 V560 User Manual 26 6 REFERENCES 1 VMEbus Specification Manual Revision C 1 October 1985 2 G Bianchetti et al Specification for VMEbus CRATE Type V430 CERN EP January 1990...

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