27/09/2002
V560 User Manual
22
4.9. REQUEST REGISTER
(Base a %0E r/w)
This register allows to control the VME interrupt generation for each section.
•
Request register<n> =1
section n scales are able to generate a VME
interrupt
•
Request register<n> =0
section n scales are not able to generate a VME
interrupt
(Bits 8 to 15 are unused and are read as "one" on the VME data bus).
The following figure shows the structure of the Request register
Sect. 0 Enable Request
Sect. 1 Enable Request
Sect. 2 Enable Request
Sect. 3 Enable Request
Sect. 4 Enable Request
Sect. 5 Enable Request
Sect. 6 Enable Request
Sect. 7 Enable Request
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
E0
E1
E2
E3
E4
E5
E6
E7
Fig. 4.6: Request register
4.10. CLEAR VME INTERRUPT
(Base a % 0C r/w)
A VME access (read or write) to this location removes the VME interrupt request (if asserted), (RORA
INTERRUPTER).
4.11. ENABLE/DISABLE VME INTERRUPT
(Base a % 08 + % 0A r/w)
A VME access (read or write) to the address Base +% 08 enables the VME interrupt generation.
A VME access (read or write) to the address Base +% 0A disables the VME interrupt generation.