CAEN
Electronic Instrumentation
UM3148
–
DT5730/DT5725 User Manual rev. 2
12
6
Cooling Management
Starting from
revision 4
of the motherboard (readable at 0xF04C address of the
Configuration ROM
), DT5730 and
DT5725 feature an automatic fan speed control to guarantee an appropriate cooling in consequence of internal
temperature variations. The automatic control is managed by the ROC FPGA firmware from
revision 4.4
on.
CAEN HEARTLY RECOMMENDS TO MONITOR THE TEMPERATURE OF THE ADC CHIPS DURING THE BOARD
OPERATION BY READING AT REGISTER ADDRESS 0x1nA8.
The user can manually set the fan speed through the bit[3] at register address 0x8168 (refer to
[RD2]
):
Hardware revision
≥ 4
and
ROC FPGA firmware revision ≥ 4.4
•
Bit[3] = 0 (default) sets the automatic fan speed control;
•
Bit[3] = 1 sets HIGH the fan speed.
Hardware revision < 4 and ROC FPGA firmware revision < 4.4
•
Bit[3] = 0 (default) sets LOW the fan speed;
•
Bit[3] = 1 sets HIGH the fan speed.
WARNING:
It is recommended not to run ROC FPGA firmware
revision < 4.4
on DT5730 or DT5725 with hardware
revision ≥ 4
as the fans will work always at the maximum speed to prevent from hardware damages, but with a high
noisiness on the other hand.