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- Technical Information Manual
11
Each of the UART interfaces signals at 3.3 V relative to GND. The specific VIH, VIL, VOH and VOL
specifications may be found in the §
Device Input and Output Specifications
paragraph page 15. The TX pins
are driven strong high and low with a sink/source current of about 8 mA. If the load on a pin draws more than
the 8 mA sink and source current, the pin is not guaranteed to meet the VOH and VOL specs listed in §
Device Input and Output Specifications
paragraph page 15. Excessive current sunk or sourced on the GPIO
pins can also cause electrical damage to the device.
Y
Warning
: Voltages outside of the maximum IO operating voltage range of -0.3 to 4.0 V should not
be applied to the UART pins. This can cause permanent damage to the device.
Reset Pin
The Lepton
7
R7100C may be reset by a logic low voltage on the NRST pin (pin 9). Usage of this pin is
recommended in all designs. It may be used to reset the part if an unexpected operating state is entered. The
Lepton
7
R7100C does have an internal watchdog circuit that will reset it if abnormal operation occurs, but the
NRST pin provides a further level of reliability.
The NRST pin is pulled high (3.3 V) by an internal 51,1 kΩ nominal resistor. To reset the part, drive the pin
strong low for at least the minimum reset pulse width as specified in §
Device Input and Output Specifications
paragraph page 15 (approximately 25 μs). This pin may be driven active low to reset the part, but should not
be driven strong high. Driving the pin strong high prevents the Lepton
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R7100C from resetting itself in case
user requested software reset. This pin should be driven using an “open drain drives low” drive mode, which
creates either a strong low voltage or a floating voltage output.
Y
Warning
: Voltages outside of the maximum IO operating voltage range of -0.3 to 4.0 V should not
be applied to the NRST pin. This can cause permanent damage to the device.
GPIO Pins
The Lepton
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R7100C’s GPIOs can be controlled using the easy2read
©
interface. Their drive mode, direction,
and state are all controllable via easy2read
©
. There are two directions: input and output. In both input and
output directions, there are three possible pin states: high, low, and float. For more details on using
easy2read
©
to control the GPIOs, see the easy2read
©
protocol documentation.
In the output direction, the GPIOs are driven strong high and low with a source and sink current of 8 mA, and
in float mode the pin is not driven either high or low, leaving the pin floating, also known as “high impedance”
or “high-Z”. The pins are driven to 3.3 V nominally. If the load on a pin draws more than the 8 mA sink and
source current, the pin is not guaranteed to meet the VOH and VOL specs listed in the §
paragraph page 15.
Y
Warning
: Excessive current sunk or sourced on the GPIO pins can also cause electrical damage
to the device.
In the input direction, the high and low states apply a pull-up or pull-down resistor, and in float mode the pin is
not pulled either high or low, leaving the pin floating, also known as “high impedance” or “high-Z”. The pull-up
and pull-down resistors are about 35 kΩ nominal. See the §
Device Input and Output Specifications
paragraph page 15 for more specific ratings. The inputs logic levels are proportional to 3.3 V. Specific VIH
and VIL specs may be found in the §
Device Input and Output Specifications
paragraph page 15.
Y
Warning
: Voltages outside of the maximum IO operating voltage range of -0.3 to 4.0 V should not
be applied to the pins, no matter their configuration. This can cause permanent damage to the
device.
