Bull NovaScale T840, Руководство пользователя

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User Guide
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The DIMMs in identical socket positions of adjacent channels of the branch must
be identical in terms of timing, technology and size. It is not required to match
DIMMs between different slot numbers. For instance, the DIMM module installed
in A1 must be identical to the one installed in B1, but can be different from the one
installed in A2.
Figure 12: Two DIMM Memory Configuration
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Memory mirroring mode
Two identical images of memory data are maintained and provide maximum
redundancy, meaning that the system can continue to operate even when
uncorrectable errors occur. The primary image is on Branch 0, and the secondary
image on Branch 1. The controller directs read transactions to the primary branch
while write transactions are directed to both branches under normal circumstances.
All DIMMs on the same DIMM sockets on the adjacent branches must be identical
in terms of technology, number of rancks, timing, and size. The total effective
memory size is reduced by one-half.
Install a minimum of four DIMMs (one pair in each branch, installed in
corresponding slots), and enable the memory mirroring feature in the BIOS Setup.
If the configuration is not suitable, the BIOS disables the mirroring and reverts to
the default memory mode.
Example: DIMM_A1, DIMM_A2, DIMM_B1, DIMM_B2
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Memory sparing mode (dual or single channel)
One of the DIMM modules is configured as spare. It is reserved, and can replace
another module in case it should fail. Spared memory configurations are not
redundant, and the system cannot continue to operate when an uncorrectable error
occurs. Memory sparing allows to detect an affected DIMM before it fails, replace
it, and preserve the system integrity by copying the data from the failing DIMM to
the reserved DIMM.
The spare DIMM must be at least the size of the largest primary DIMM in use.
When sparing is enabled, the BIOS selects the spare automatically during POST,
and the total effective memory size will be reduced by the size of the spare DIMM.