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6-1
Confidential
CHAPTER 6 WIRING DIAGRAM
1.
WIRING DIAGRAM
Hall IC
Hall IC
Hall IC
M
Process motor
5V tolerant
+3.3V
VCC
VM
+24V
RMTB_ENABLE
ENBn
CN32
ADF_REARB_SEN
B
/
B
/
12
1
/B
STEP
B
B
11
2
B
R
I
D
_
B
T
M
R
S
B
_
G
T
_
S
I
C
DIR
A
/
A
/
10
3
/A
CN35
USM0
A
A
9
4
A
1
2
3
4
5
6
7
8
9
VOUT0
CISIN0
ADCK
1
M
S
U
_
B
T
M
R
P
M
S
V
E
F
A
USM1
+3.3V_SLPOFF
VDD_RS
8
SGND
SHD
AFEMCLK
RMTB_VREF
VREF
SGND
7
LED_3.3V
VOUT1
CISIN1
SEN_ADF_REAR
6
SGND
FG
SGND
SCLK
AFE_SCK
VDD_FCS
5
ADF_REAR
VOUT2
CISIN2
SDATA
AFE_SDI
SGND
4
SGND
AVDD
ADF_FRONT_SEN
3
DETECT
OVDD
D[7:0]
AFED[9:2]
SGND
2
SP
ADF_COVER_SW
1
LED_3.3V
VDD
SGND
10
CLK
ADF_FRONT
11
LEDG
RESETB
12
LEDR
LED_R
ISET
13
LEDB
LED_B
EN
CIS_LED_EN
ADF_REAR_SEN
14
LEDA
+5.3V
LVDD
CONT_B
CIS_LEDB_BS
ADF_FRONT_SEN
VDC
CONT_G
CIS_LEDG_BS
ADF_COV_SEN
CONT_R
CIS_LEDR_BS
+3.3V
VCC
VM
+24VF
LVSS
RMTA_ENBLE
ENBn
CN28
+R3.3V_BS
RMTA_SLEEP
SLEEPn
B
/
B
/
4
1
/B
RMTA_STEP
STEP
B
B
3
2
B
Vout
Vin
+5.3V
RMTA_DIR
DIR
A
/
A
/
2
3
/A
EN
CIS_R33V0N
RMTA_USM0
USM0
A
A
1
4
A
+R3.3V_FS
RTMA_USM1
USM1
RMTA_VREF
VREF
Vout
Vin
+5.3V
FG
EN
DDR_MMZQ
DDR_DDR3VOUT
DCIS_SDIO
CIS_MODE
CIS_TG
DDR_MMVREF
CN34
CIS_CLK
VOUT0
CISIN0
ADCK
DDR_MMCK
SGND
SHD
DDR_MMXCK
VOUT1
CISIN1
DDR_MMCKE0
SGND
SCLK
VOUT2
CISIN2
SDATA
DDR_MMXRESET
SGND
AVDD
DDR_MMXRAS
DETECT
OVDD
D[7:0]
DDR_MMXCAS
SP
DDR_MMXWE
VDD
DDR_MMXCS0
CLK
LEDG
LED_G
RESETB
5
NFC_WAKE
LEDR
LED_R
ISET
DDR_MMODT0
4
SCL
LEDB
LED_B
EN
AFE_SEN
3
SGND
LEDA
+5.3V
LVDD
CONT_B
CIS_LEDB
2
SDA
VDC
CONT_G
CIS_LEDG
DDR_MMA[15:0]
1
REG_PU
CONT_R
CIS_LEDR
DDR_MMBA[2:0]
LVSS
DDR_MMDQS1
DDR_MMDQS0
DDR_MMXDQS1
DDR_MMXDQS0
DDR_MMDM[1:0]
DDR_MMDQ[15:0]
CN31
MD1_THM_ALM
NFC_WAKE
1
SCL2
SCL
2
SGND
3
CN33
SDA2
SDA
4
La
SDO
1
1
SDO
4
L
E
N
A
P
T
U
O
D
I
P
S
_
M
D
M
REG_PU
5
Lb
TELOFF
2
2
TELOFF
MDM_TELOFF
FG
GIJI
3
3
GIJI
I
J
I
G
_
M
D
M
FG
CSn
4
4
CSn
MDM_SPICSN
Rin
5
5
Rin
MDM_CI
RESETn
6
6
RESETn
MDM_RESETN
Ta
IRQ
7
7
IRQ
MDM_INTN
Tb
SGND
8
8
SGND
SCK
9
9
SCK
MDM_SPICLK
SGND
0
1
0
1
SGND
MDM_SDI
1
1
1
1
MDM_SDI
MDM_SPIDIN
+24V
2
1
2
1
+24V
+24V
MDM_MONI
3
1
3
1
MDM_MONI
SGND
4
1
4
1
SGND
MDM_RING
+3.3V
5
1
5
1
+3.3V
+3.3V
MDM_SPKR_ONN
CN36
2
VO1
1
VO2
7
1
D
0
1
D
_
T
F
T
1
1
D17
6
1
D
9
D
_
T
F
T
2
2
D16
SCL0
5
1
D
8
D
_
T
F
T
3
3
D15
SDA0
+5.3V
LDO
4
1
D
7
D
_
T
F
T
4
4
D14
3
1
D
6
D
_
T
F
T
5
5
D13
+3.3V
SCL0
2
1
D
5
D
_
T
F
T
6
6
D12
A[2:0]=111
SDA0
1
1
D
4
D
_
T
F
T
7
7
D11
+5.3V
LDO
VDD_LCD
0
1
D
3
D
_
T
F
T
8
8
D10
SGND
9
9
SGND
SPI_DATA[3:0]
FMARK
10
10
FMARK
SPI_CS0
VDD_LCD
IOVCC
11
11
IOVCC
SPI_CS1
VCC
12
12
VCC
SPI_CS2
SGND
13
13
SGND
+3.3V
+3.3V
T
E
S
E
R
N
_
T
S
R
_
T
F
T
14
14
RESET
S
C
N
_
S
C
_
T
S
T
15
15
CS
S
R
N
_
T
S
R
_
T
F
T
16
16
RS
SGND
17
17
SGND
R
W
N
_
R
W
_
T
F
T
18
18
WR
CN29
D
R
N
_
D
R
_
T
F
T
19
19
RD
SPI_CLK
REG_PU
1
1
REG_PU
+24V
LED+
20
20
LED+
PANEL3
TE
2
2
-
D
E
L
M
W
P
D
E
L
_
T
F
T
E
T
21
21
LED-
M
W
P
_
D
E
L
L
T
C
_
D
E
L
R
N
T
3
3
LED_PWM
High-Side SW
to HYPNOS
SW_ONOFF
ON/OFF
4
4
ON/OFF
EN
USBH_PPON1
+3.3V
5
5
+3.3V
Fault
USBH_OCI1
6
6
+3.3V
CN21
+5.3V
SGND
7
7
SGND
1
X
Y
E
K
1
M
W
P
1
13
KEY X1
FG
6
1
FG
P
_
K
L
C
_
S
P
V
L
P
_
K
L
C
T
_
L
N
P
8
8
P
_
K
L
C
_
S
P
V
L
P
_
K
L
C
_
S
P
V
L
2
X
Y
E
K
2
M
W
P
2
12
KEY X2
1
S
U
B
V
S
U
B
V
5
2
VBUS
Vout
Vin
N
_
K
L
C
_
S
P
V
L
N
_
K
L
C
T
_
L
N
P
9
9
N
_
K
L
C
_
S
P
V
L
N
_
K
L
C
_
S
P
V
L
3
X
Y
E
K
3
M
W
P
3
11
KEY X3
2
DATA-
DATA-
4
3
DATA+
USBH_DP1
SGND
10
10
SGND
LED_PWM
4
10
LED_PWM
ON/OFF
3
DATA+
DATA+
3
4
DATA-
USBH_DM1
P
_
1
A
T
A
D
_
S
P
V
L
P
_
1
X
T
_
L
N
P
11
11
P
_
1
A
T
A
D
_
S
P
V
L
P
_
1
A
T
A
D
_
S
P
V
L
ON/OFF
5
9
ON/OFF
4
D
N
G
S
D
N
G
S
2
5
SGND
N
_
1
A
T
A
D
_
S
P
V
L
N
_
1
X
T
_
L
N
P
12
12
N
_
1
A
T
A
D
_
S
P
V
L
N
_
1
A
T
A
D
_
S
P
V
L
SGND
6
8
SGND
5
G
F
G
F
1
SGND
13
13
SGND
3
T
U
O
Y
E
K
4
1
D
_
T
F
T
7
7
KEY OUT3
0
6
FG
P
_
0
A
T
A
D
_
S
P
V
L
P
_
0
X
T
_
L
N
P
14
14
P
_
0
A
T
A
D
_
S
P
V
L
P
_
0
A
T
A
D
_
S
P
V
L
2
T
U
O
Y
E
K
3
1
D
_
T
F
T
8
6
KEY OUT2
RTERM_CAL0
N
_
0
A
T
A
D
_
S
P
V
L
N
_
0
X
T
_
L
N
P
15
15
N
_
0
A
T
A
D
_
S
P
V
L
N
_
0
A
T
A
D
_
S
P
V
L
1
T
U
O
Y
E
K
2
1
D
_
T
F
T
9
5
KEY OUT1
SGND
16
16
SGND
0
T
U
O
Y
E
K
1
1
D
_
T
F
T
10
4
KEY OUT0
N
_
T
E
S
E
R
2
L
E
N
A
P
17
17
2
N
I
Y
E
K
9
1
D
_
T
F
T
N
_
C
I
T
S
R
N
_
T
E
S
E
R
11
3
KEY IN2
9
USBH_PPON2
D
X
R
_
N
I
A
M
0
L
E
N
A
P
18
18
D
X
T
D
X
R
_
N
I
A
M
1
N
I
Y
E
K
8
1
D
_
T
F
T
12
2
KEY IN1
*
USBH_OCI2
D
X
T
_
N
I
A
M
1
L
E
N
A
P
19
19
D
X
R
D
X
T
_
N
I
A
M
0
N
I
Y
E
K
7
1
D
_
T
F
T
13
1
KEY IN0
#
+5.3V
20
20
+5.3V
+5.3V
SGND
21
21
SGND
+24V
22
22
+24V
USBH_DM2
USBH_DP2
Touch Panel Cir.
TCH_AD0
-
X
0
T
L
C
_
H
C
T
4
1
X-
-
Y
1
T
L
C
_
H
C
T
3
2
Y-
+
X
3
T
L
C
_
H
C
T
2
3
X+
+
Y
2
T
L
C
_
H
C
T
1
4
Y+
TCH_AD1
CN20
1
PC_+5V
USBF_VBUS
2
DATA_M
USBF_DM
3
DATA_P
USBF_DP
4
SGND
RTERM_CAL1
+3.3V
AVDD33_2_USB2
+3.3V
CN25
Switch circuit
WLAN_ON
SGND
1
1
SGND
2
L
E
N
A
P
2
L
E
N
A
P
+3.3V
2
2
+3.3V
SDIO_DATA0
3
3
SDIO_DATA0
SDIO0_DATA0
1
L
E
N
A
P
1
L
E
N
A
P
CN31
SDIO_DATA1
4
4
SDIO_DATA1
SDIO0_DATA1
0
L
E
N
A
P
0
L
E
N
A
P
+5.3V
1
1
+5.3V
+5.3V
DATA
1
1
DATA
SDIO_DATA3
5
5
SDIO_DATA3
SDIO0_DATA3
N
I
D
S
_
N
I
A
M
0
L
E
N
A
P
2
2
PNL_SDOUT
SCK
2
2
SCK
SDIO_CLK
6
6
SDIO_CLK
SDIO0_CLK
PANEL1
MAIN_SDOUT
3
3
PNL_SDIN
STB
3
3
STB
SDIO_DATA2
7
7
SDIO_DATA2
SDIO0_DATA2
PANEL2
MAIN_SDCLK
4
4
PNL_SDCLK
VREF
4
4
VREF
SDIO_CMD
8
8
SDIO_CMD
SDIO0_CMD
SGND
5
5
SGND
SGND
5
5
SGND
to HYPNOS
SW_ONOFF
POWER_SW
6
6
POWER_SW
+5.3V
+5.3V
6
6
VDD
)
i
f
i
W
(
KEY MATRIX
+3.3V
CKXTAL1
CKXTAL2
ETH_REFCLK
PHYRSTB
ETH_RSTN
INTB
EXINT0N
CN24
REF_CLK
ETH_RXCLK
1
TX+
1
TD+
MDI+[0]
ETH_TXD[3]
CN3
2
TX-
2
TD-
MDI-[0]
ETH_TXD[2]
1
3
RX+
3
CT1
TXD[1:0]
SOL_CLT2
CLUTCH CTRL
REG_CLT
2
4
-
4
NC
TXEN
ETH_TX_EN
CIRCUIT
5
-
5
NC
MDC
ETH_MDC
CN4
6
RX-
6
NC
MDIO
ETH_MDIO
1
7
-
7
RD+
MDI+[1]
1
T
L
C
_
L
O
S
K
L
C
X
T
_
H
T
E
CLUTCH CTRL
PFEED_CLT
2
8
-
8
RD-
MDI-[1]
CRS_DV
ETH_RX_DV
CIRCUIT
ETH_RXD[3]
CN1
ETH_RXD[2]
1
RXD[1:0]
3
T
L
C
_
L
O
S
]
0
:
1
[
D
X
R
_
H
T
E
SOL CTRL
DXPRINT_CLT
2
CIRCUIT
CN6
CN23
+24V
1
LED_VCC
3
3
LED_VCC
HV_TRCC2
CLUTCH CTRL
DEVREL_CLT
2
MP_REG_SEN
2
2
MP_REG_SEN
SEN3(MP REG)
CIRCUIT
SGND
1
1
SGND
CN15
SXOUT
+24V
1
HV_TRCC1
CLUTCH CTRL
DEVSTP_CLT
2
CN19
SXIN
CIRCUIT
LED_VCC
3
3
LED_VCC
Ethernet/S ystem
CN12
MP_PE_SEN
2
2
MP_PE_SEN
SEN4(MP PE)
25MHz
+24V
1
SGND
1
1
SGND
HV_TRCC3
SOL CTRL
MP_SOL_CLT
2
CIRCUIT
VDOCAL1
CN18
-
PEMPTY_SEN
SEN8(PEMPTY_SEN)
CN27
SGND
1
2
SGND
N
T
E
S
E
R
N
_
T
S
R
_
O
D
V
X
R
_
1
T
R
A
U
_
G
N
E
0
D
E
F
A
1
6
3
RESETN
SCK
1
1
SCK
LED_VCC
2
3
LED_VCC
X
T
_
1
T
R
A
U
_
G
N
E
F
E
R
V
_
2
D
M
SGND
2
5
3
SGND
SGND
2
2
SGND
PEDGE_SEN
3
4
PEDGE_SEN
P
_
1
D
_
O
D
V
X
R
_
0
T
R
A
U
_
G
N
E
R
I
D
_
2
D
M
)
N
E
S
_
E
G
D
E
P
(
9
N
E
S
VDOCLK_P
3
4
3
VDOCLK_P
+3.3V
/WC
3
3
/WC
N
_
1
D
_
O
D
V
0
T
N
I
_
G
N
E
3
O
I
V
E
R
VDOCLK_N
4
3
3
VDOCLK_N
SGND
4
4
SGND
1
T
N
I
_
G
N
E
5
L
E
N
A
P
SGND
5
2
3
SGND
SDA
5
5
SDA
CN17
P
_
3
D
_
O
D
V
N
_
T
E
S
E
R
_
G
N
E
O
D
_
1
D
M
VDODATA0_P
6
1
3
VDODATA0_P
+3.3V
6
6
+3.3V
MANUAL_SEN
5
5
MANUAL_SEN
N
_
3
D
_
O
D
V
N
_
F
F
O
T
O
M
_
G
N
E
4
T
L
C
_
L
O
S
)
L
A
U
N
A
M
(
0
N
E
S
VDODATA0_N
7
0
3
0
1
_
I
H
P
N
_
0
A
T
A
D
O
D
V
7
7
PHI_10
REG_R_SEN
4
4
REG_R_SEN
M
A
R
_
N
O
I
T
N
E
T
E
R
N
D
B
V
)
R
A
E
R
(
0
1
N
E
S
SGND
8
9
2
SGND
PHI_9
8
8
PHI_9
LED_VCC
3
3
LED_VCC
PCIE_TX_P
PCIE0_RX_P
VDO_D5_P
VDODATA1_P
9
8
2
VDODATA1_P
+3.3V
9
9
+3.3V
REG_F_SEN
2
2
REG_F_SEN
SEN1(REGF)
PCIE_TX_N
PCIE0_RX_N
VDO_D5_N
VDODATA1_N
27
10
1
1
_
I
H
P
N
_
1
A
T
A
D
O
D
V
10
10
PHI_11
SGND
1
1
SGND
PCIE_RX_P
PCIE0_TX_P
SGND
26
11
SGND
PHI_12
11
11
PHI_12
PCIE_RX_N
PCIE0_TX_N
VDO_D7_P
VDODATA2_P
25
12
VDODATA2_P
+3.3V
12
12
+3.3V
PCIE_PERST_N
PCIE0_PERST_N VDO_D7_N
VDODATA2_N
24
13
6
1
_
I
H
P
N
_
2
A
T
A
D
O
D
V
13
13
PHI_16
SGND
23
14
SGND
PHI_15
14
14
PHI_15
VDO_D2_P
VDODATA3_P
22
15
VDODATA3_P
+3.3V
15
15
+3.3V
CN22
HUMID_P
VDO_D2_N
VDODATA3_N
21
16
5
_
I
H
P
N
_
3
A
T
A
D
O
D
V
16
16
PHI_5
HUM_P_PWM
3
1
HUM_P_PWM
HUMID_N
SGND
20
17
SGND
PHI_8
17
17
PHI_8
HUM_SEN
2
2
HUM_SEN
AI4(HUM)
PCIE_WAKE_N
+5.3V
N
C
N
Y
S
V
C
4
N
D
B
V
_
D
L
0
S
A
I
B
R
_
E
I
C
P
19
18
VSYNCN
18
18
+3.3V
THM_GAIKI
1
3
THM_GAIKI
AI5(THM)
LDO
SGND
18
19
SGND
PHI_7
19
19
PHI_7
ERASE_LAMP
STBY VIN
0
A
T
A
D
Q
E
R
0
M
W
P
_
D
L
17
20
REQDATA0
PHI_6
20
20
PHI_6
VOUT
SGND
16
21
SGND
+3.3V
21
21
+3.3V
CLKG+3.3V
1
A
T
A
D
Q
E
R
1
M
W
P
_
D
L
F
F
O
_
K
L
C
_
0
E
I
C
P
15
22
REQDATA1
PHI_20
22
22
PHI_20
PCIE_REFCLK
PCIE0_REFCLK_P
SGND
14
23
SGND
PHI_19
23
23
PHI_19
2
A
T
A
D
Q
E
R
2
M
W
P
_
D
L
N
_
K
L
C
F
E
R
_
0
E
I
C
P
13
24
REQDATA2
+3.3V
24
24
+3.3V
SGND
12
25
SGND
PHI_18
25
25
PHI_18
3
A
T
A
D
Q
E
R
3
M
W
P
_
D
L
O
_
K
L
C
F
E
R
_
0
E
I
C
P
11
26
REQDATA3
PHI_17
26
26
PHI_17
CLKGEN IC
25MHz
PCIE0_CLK_CHDRV
SGND
10
27
SGND
+3.3V
27
27
+3.3V
SCL1
KSCL
8
2
9
KSCL
PHI_2
28
28
PHI_2
SGND
9
2
8
SGND
PHI_1
29
29
PHI_1
SDA1
KSDA
0
3
7
KSDA
+3.3V
30
30
+3.3V
SGND
1
3
6
SGND
17MHz
PHI_3
31
31
PHI_3
N
E
D
A
E
H
N
E
_
O
D
V
2
3
5
HEADEN
EN
PHI_4
32
32
PHI_4
SGND
3
3
4
SGND
+3.3V
33
33
+3.3V
VDO_E2P_SCL
SGND
4
3
3
SGND
+3.3V
PHI_13
34
34
PHI_13
VDO_E2P_SDA
+24V
5
3
2
+24V
PHI_14
35
35
PHI_14
LD_SH1
+24V
6
3
1
+24V
+3.3V
36
36
+3.3V
LD_SH2
DCDC
PH1
37
37
PH1
LD_SH3
+3.3V
+1.2V
SGND
38
38
SGND
LD_SH4
Reg.
PH2
39
39
PH2
SGND
40
40
SGND
ENG_UART0_TX
P_EMP_PWM
P_EMP_LED
DEN Signal
DEN_SEN2
5
1
DEN_SEN2
ERASE1
CN7
Receive Circuit
DEN_SEN1
4
2
DEN_SEN1
LD_VBDN1
HU+
1
1
HU+
+5.3V
LEFT_LED_VCC
3
3
LEFT_LED_VCC
HU-
2
2
HU-
SGND
2
4
SGND
HV_TRCC0
HV+
3
3
HV+
Hall IC
+5.3V
+5.3V
1
5
+5.3V
+5.3V
HV_DCLNA_N
HV-
4
4
HV-
HV_GRD2
HW+
5
5
HW+
HV_GRD3
HW-
6
6
HW-
DEN Signal
CN16
0
V
E
D
_
V
H
1
N
L
C
D
_
M
W
P
V
H
+24V_M2
SGND
7
7
SGND
Hall IC
Receive Circuit
RMARK_SEN_R
4
1
2
N
E
S
_
N
E
D
R
_
N
E
S
_
K
R
A
M
R
13
1
DEN_SEN2
AI7(DENS_L_SP)
SEN_REG_REAR
+5.3V_SLPOFF
+5.3V
8
8
+5.3V
+5.3V
RIGHT_LED_VCC
3
2
RIGHT_LED_VCC
DEN_SEN1
12
2
DEN_SEN1
AI8(DENS_L_DF)
HV_DCLNA_P
MD2_RST_N
U
9
9
U
SGND
2
3
C
C
V
_
D
E
L
_
T
F
E
L
D
N
G
S
11
3
LEFT_LED_VCC
HVPWM_DEV
HV_DEV3
MD2_CLK
U
10
10
U
+5.3V
+5.3V
1
4
+5.3V
+5.3V
+5.3V
+5.3V
10
4
+5.3V
filter
HVPWM_CHG
MD2_DATA
U
11
11
U
RMARK_SEN_R
9
5
RMARK_SEN_R
HVPWM_TRCC
TEST_MODE
MD2_PWM
V
12
12
V
1
L
A
N
R
E
T
N
I
_
M
H
T
L
A
N
R
E
T
N
I
_
M
H
T
8
6
THM_INTERNAL
AI6(BOX_THM)
V
13
13
V
2
+3.3V
+3.3V
RIGHT_LED_VCC
7
7
RIGHT_LED_VCC
HVPWM_TRCV
MD2_FG
V
14
14
V
Hall IC
SGND
6
8
SGND
MD2_HALL
W
15
15
W
EJECT_SEN
5
9
EJECT_SEN
S
D
P
M
)
n
e
S
t
c
e
j
j
E
(
6
N
E
S
W
16
16
W
EJECTSEN_LED
4
10
EJECTSEN_LED
AI2(THM_C)
MD_ENBL
W
17
17
W
1
+3.3V
+3.3V
+3.3V
+3.3V
3
11
+3.3V
+24V
FG+
18
18
FG+
2
C
_
R
E
S
U
F
_
M
H
T
C
_
R
E
S
U
F
_
M
H
T
2
12
THM_FUSER_C
Vref
FG-
19
19
FG-
THM_FUSER_E
1
13
THM_FUSER_E
D
I
_
R
O
T
O
M
1
W
E
N
P
-
1
SGND
Vref
2
THM_FUSER_E
+3.3V
HT_LIMITN
CN14
+5.3V
AI3(THM_E)
HU+
1
1
HU+
LDO
HU-
2
2
HU-
+24V
DCDC
Vin
Vout
HV+
3
3
HV+
+1.17V
HV-
4
4
HV-
HW+
5
5
HW+
DCDC
HW-
6
6
HW-
+3.3V
+24V_M1
SGND
7
7
SGND
MP Model only
N1
+5.3V_SLPOFF
+5.3V
8
8
+5.3V
N2
+24V
DCDC
MD1_RST_N
U
9
9
U
L
+1.5V
MD1_DATA
U
10
10
U
(DDR3)
MD1_CLK
U
11
11
U
DCDC
MD1_PWM
V
12
12
V
+1.0V
VSS
V
13
13
V
MD1_FG
V
14
14
V
DCDC
+3.3V
WD IC
MD1_HALL
W
15
15
W
MD1_RSTN
W
16
16
W
MD1_MAINCTL
W
17
17
W
FG+
18
18
FG+
HYPNOS
FG-
19
19
FG-
+3.3V
CPU_VOL
CPURST
RSTICN
D
I
_
R
O
T
O
M
0
D
R
G
_
V
H
-
CPURST_MR_N
+3.3V
Single Twin
VDD
REVOUT2
SEN7
L
1
1
ZC_IN
XIN
32.768kHz
CN30
N2
2
XOUT
R
E
V
O
C
R
_
N
E
S
1
D
R
G
_
V
H
1
N1
2
3
SCL
SCL0
SGND
2
SW_ONOFF
OFFACT_IN0
SDA
SDA0
REVOUT1
CN2
CN10
+24V
1
2
+24V
HEAT_ON2
HEAT_ON2
REVIO4
PGND
2
1
PGND
ZERO_CROSS
ZERO_CROSS
HT_ZEROXN
CN9
OFF MODE
OFF MODE
(FB_CHG) AI0
FB_HV
0
3
1
FB_HV
HEAT_ON1
HEAT_ON1
HT_HEATON0N
E
L
B
A
N
E
_
V
H
0
O
I
V
E
R
9
2
2
HV_ENABLE
DSLEEP
DSLEEP
N
C
D
D
I
R
G
P
E
E
L
S
_
D
GRIDC
8
2
3
GRIDC
RL_DRIVE
RL_DRIVE
HT_RLYOFF0N
N
E
S
_
L
E
R
_
V
E
D
N
L
C
_
N
E
S
7
2
4
N
E
S
_
L
E
R
_
V
E
D
N
E
S
_
L
E
R
_
V
E
D
3
1
DEV_REL_SEN
AC_DIRECT_VDD
AC_DIRECT_VDD
3
W
E
N
P
2
W
E
N
P
6
2
5
PNEW3
DEVREL_VCC
2
2
DEVREL_VCC
24V_L
24V_L
+24V
1
W
E
N
P
0
W
E
N
P
5
2
6
PNEW1
SGND
1
3
SGND
L1
L1
PGND
PGND
+1.0V
4
W
E
N
P
3
W
E
N
P
4
2
7
PNEW4
FG
24V_M2
24V_M2
+24V_M2
+3.3V_SLPOFF
3
2
8
+3.3V_SLPOFF
N
N
PGND
PGND
M
W
P
_
1
G
H
C
L
L
U
F
_
0
N
A
F
2
2
9
CHG1_PWM
24V_M1
24V_M1
+24V_M1
+3.3V
M
W
P
_
1
R
T
L
E
R
_
T
L
C
10
21
TR1_PWM
Bias1
PGND
PGND
M
W
P
_
1
D
I
R
G
R
N
T
_
T
S
W
11
20
GRID1_PWM
TMP_SENSOR
TMP_SENSOR
AI9
M
W
P
_
2
R
T
X
D
_
T
L
C
12
19
TR2_PWM
M
W
P
_
2
D
I
R
G
W
E
N
_
T
L
E
B
13
18
GRID2_PWM
PNEW_SEN1
HV_DEV2
BCLN_PWM
14
17
BCLN_PWM
Bias2
M
W
P
_
1
V
E
D
L
E
R
_
N
E
S
15
16
DEV1_PWM
M
W
P
_
4
G
H
C
F
L
A
H
_
0
N
A
F
16
15
CHG4_PWM
M
W
P
_
2
V
E
D
X
D
_
N
E
S
17
14
DEV2_PWM
PNEW_SEN2
M
W
P
_
4
R
T
P
I
N
_
T
L
C
18
13
TR4_PWM
Bias3
VDOCAL2
MPX_S0
19
12
MPX_S0
M
W
P
_
3
R
T
T
S
B
_
T
L
C
20
11
TR3_PWM
LD_PWR_PWM1
MPX_S2
21
10
MPX_S2
PNEW_SEN3
M
W
P
_
3
V
E
D
I
N
I
M
_
X
D
_
N
E
S
9
2
2
DEV3_PWM
Bias4
VENB
MPX_S1
8
3
2
MPX_S1
M
W
P
_
4
V
E
D
V
S
R
_
T
L
C
7
4
2
DEV4_PWM
M
W
P
_
A
N
L
C
D
1
V
E
D
_
V
H
6
5
2
DCLNA_PWM
PNEW_SEN4
M
W
P
_
3
D
I
R
G
P
I
N
_
N
E
S
5
6
2
GRID3_PWM
K
C
O
L
_
N
A
F
N
_
K
C
O
L
_
0
N
A
F
4
7
2
FAN_LOCK
2
N
E
S
COVER_OPEN_SW
3
8
2
K
C
O
L
_
N
A
F
W
S
_
N
E
P
O
_
R
E
V
O
C
3
SGND
2
9
2
SGND
Top cover sensor
SGND
2
+24V_M2
FAN CTRL
FAN_VCC
1
0
3
FAN_VCC
FAN_VCC
1
HV_CHG0
CIRCUIT
HV_CHG1
LD_VBDN1
+5.3V
FORTEC_PWR CTRL
CN26
FORTEC_PWR
CIRCUIT
FORTEC_PWR
7
1
R
W
P
_
C
E
T
R
O
F
R
W
P
_
C
E
T
R
O
F
1
1
FORTEC_PWR
FORTEC_CMYK_SCK
FORTEC_CMYK_SCK
6
2
K
C
S
_
K
Y
M
C
_
C
E
T
R
O
F
K
C
S
_
K
Y
M
C
_
C
E
T
R
O
F
2
2
FORTEC_CMYK_SCK
O
I
S
_
M
_
C
E
T
R
O
F
O
I
S
_
M
_
C
E
T
R
O
F
5
3
FORTEC_M_SIO
SGND
3
3
SGND
O
I
S
_
C
_
C
E
T
R
O
F
O
I
S
_
C
_
C
E
T
R
O
F
4
4
O
I
S
_
K
_
C
E
T
R
O
F
O
I
S
_
C
_
C
E
T
R
O
F
4
4
FORTEC_K_SIO
O
I
S
_
Y
_
C
E
T
R
O
F
O
I
S
_
Y
_
C
E
T
R
O
F
3
5
FORTEC_Y_SIO
O
I
S
_
K
_
C
E
T
R
O
F
O
I
S
_
K
_
C
E
T
R
O
F
2
6
FORTEC_K_SIO
SGND
1
7
SGND
FORTEC_H_SCK
CONTROL IC
FORTEC_H_SIO
CHIP
5.3V_SLPOFF
HV_BCLN
+3.3V_SLPOFF
REVIO1
+3.3V_INTVL
AFED1
USB
Function
(TypeB)
DDR3-SDRAM
(Max 4Gb)
ADR
[1
2
:0
]
+1.5V
+1.5V
SerialFLASH
(ROM1)
SerialFLASH
(ROM0)
VREF
Kybele
+1.5V
INLET
Low-voltage power supply
AC/DC
power IC
2
4
V control circuit
Zero cross
HEATER_ON
Relay
Connector
Main-Heater
Thermostat
Vref
+3.3V
+3.3V
EJECT
Eject sensor PCB
VBUS(detect)
Wireless LAN
PCB
HUMID
TEMP
External temperature/
MAIN PCB
25MHz
+5.3V
Fuser unit
(front side)
First side
Second side
REG.
AFE
+ LED DRV
Duplex scan model only
AFE
+ LED DRV
Step
pi
n
g
M
o
t
Dr
iv
e
r
Speaker
Modem PCB
+3.3V
Speaker AMP
LINE
EXT
DAA
V34 MODEM
+24V
M
FB motor
Document scanning position
Document detection sensor PCB
ADF cover sensor
ADF motor
EEPROM
M
Steppi
n
g
M
o
t
Dr
iv
e
r
NFC
Module
10/100 base Ethernet
PHY
RMII
M
onet
LED ASSY
LED ASSY
x4
M
Paper feed motor
Motor
Driver
Rs
Motor
Driver
Develop release
CHG
DEV
GRID
TR
FAN
Cartridge
R
W
P
_
C
E
T
R
O
F
1
1
FORTEC_PWR
K
C
S
_
K
Y
M
C
_
C
E
T
R
O
F
2
2
FORTEC_CMYK_SCK
SGND
3
3
SGND
O
I
S
_
Y
_
C
E
T
R
O
F
4
4
FORTEC_Y_SIO
R
W
P
_
C
E
T
R
O
F
1
1
FORTEC_PWR
K
C
S
_
K
Y
M
C
_
C
E
T
R
O
F
2
2
FORTEC_CMYK_SCK
SGND
3
3
SGND
O
I
S
_
M
_
C
E
T
R
O
F
4
4
FORTEC_M_SIO
R
W
P
_
C
E
T
R
O
F
1
1
FORTEC_PWR
K
C
S
_
K
Y
M
C
_
C
E
T
R
O
F
2
2
FORTEC_CMYK_SCK
SGND
3
3
SGND
O
I
S
_
C
_
C
E
T
R
O
F
4
4
FORTEC_C_SIO
MP solenoid
Develop clutch
Develop release clutch
Duplex clutch
T1 pick-up clutch
Registration clutch
Back cover sensor
MP registration sensor PCB
MP paper empty sensor PCB
T1 paper feed sensor PCB
regist rear/
Manual feed paper empty /
regist front
Rs
Internal temperature sensor
Selene(80pin)
+1.2V
LCD
(with backlight)
Touch Panel
Key PCB
PANEL9
LCD
Registration mark
REG.
Panel control PCB
Panel control PCB
Cartridge sensor
relay PCB
NFC PCB
LED control PCB
Sub-Heater
Kybele
Geuse
Geuse
detecting
circuit
+5.3V
+3.3V_SLPOFF
+3.3V
+3.3V_INTVL
+3.3V_INTVL
+3.3V_INTVL
+3.3V_INTVL
+5.3V
+5.3V
LED_G
+3.3V
+3.3V
+5.3V
+24V
+24V_M2
+24V_M2
+24V_M2
+24V_M2
+24V
+24V_M2
+24V_M2
+24V
+24V
+5.3V
+24V
+5.3V
+3.3V
+3.3V
+3.3V_INTVL
+3.3V_SLPOFF
+24V
+3.3V
+24V
Back Light
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V_SLPOFF
+3.3V_SLPOFF
CIS unit
CIS unit
Fax model only
Wireless LAN model only
sensor PCB
humidity
sensor
USB host PCB
sensor L PCB
Registration mark
sensor R PCB
PCB
ETH_TXD[1:0]
sensor(K)
Cartridge
sensor(Y)
Cartridge
sensor(M)
Cartridge
sensor(C)
High-voltage power supply
PCB
sensor PCB
sensor PCB
2Line LCD model only
Touch panel model only
NFC model only
MP model only
Manual feed model only
RMTB_STEP
RMTB_USM0
CIS_CLK_BS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DCLNA
BCLN
Waste toner sensor
Содержание DCP-L3510CDW
Страница 46: ...2 10 Confidential 2 2 2 Scanner part Fig 2 6 Left side Right side Document feed path ...
Страница 50: ...2 14 Confidential Fig 2 8 Document scanning position sensor Document detection sensor ADF cover sensor ...
Страница 155: ...2 119 Confidential Electrodes location of belt unit Fig 2 16 ...
Страница 193: ...3 2 Confidential 2 PACKING Pad upper R Pad upper L Carton Pad bottom Option carton upper ...
Страница 203: ...3 12 Confidential 4 Lower document chute Flat core Second side CIS flat cable Lower document chute ...
Страница 204: ...3 13 Confidential 5 Panel unit Key flat cable ...
Страница 212: ...3 21 Confidential 13 High voltage power supply flat cable High voltage power supply flat cable ...
Страница 213: ...3 22 Confidential 14 Process drive unit Paper feed motor flat cable ...
Страница 228: ...3 37 Confidential 9 6 Cord hook 1 Remove the Cord hook Two locations Fig 3 15 Cord hooks Cord hook Back side ...
Страница 347: ...5 19 Confidential Fig 5 7 Document scanning position sensor Document detection sensor ADF cover sensor ...
Страница 362: ...5 34 Confidential Print adjustment test pattern Fig 5 8 ...