Modbus Agile
39
02/2011
Protocol
7.3.10.1.2
Frame Description
Slave
Address
Function
Code
Data
CRC
1 Byte
1 Byte
0 to 252 Bytes
2 Bytes
(CRC-Lo, CRC-Hi)
The maximum size of a MODBUS RTU frame is 256 bytes.
7.3.10.1.3
Modbus Message RTU Framing
A MODBUS message is placed by the transmitting device into a frame that has a known beginning and
ending point. This allows devices that receive a new frame to begin at the start of the message, and
to know when the message is completed. Partial messages must be detected and errors must be set
as a result. In RTU mode, message frames are separated by a silent interval of at least 3.5 character
times.
MODBUS Message
Start
Address
Function Data
CRC
End
>= 3,5
Char
8 Bits
8 Bits
N x 8 Bits
16 Bits
>= 3,5
Char
The entire message frame must be transmitted as a contiguous stream of characters.
If a silent interval of more than 1.5 character times occurs between two characters, the message
frame is declared incomplete and is discarded by the inverter.
7.3.10.1.4
CRC Checking
The RTU mode includes an error–checking field that is based on a Cyclical Redundancy Checking
(CRC) method performed on the message contents.
The CRC field checks the contents of the entire message. It is applied regardless of any parity check-
ing method used for the individual characters of the message.
The CRC field contains a 16–bit value implemented as two 8–bit bytes.
The CRC field is appended to the message as the last field in the message. It is appended in the se-
quence "low-order byte", "high-order byte". The CRC high–order byte is the last byte to be sent in the
message.
The CRC value is calculated by the sending device, which appends the CRC to the message. The re-
ceiving device recalculates a CRC during receipt of the message, and compares the calculated value to
the actual value it received in the CRC field. If the two values are not equal, an error results.
The CRC calculation is started by first pre-loading a 16–bit register to all 1’s (0xFFFF). Then a process
begins of applying successive bytes of the message to the current contents of the register.
During generation of the CRC, each 8bit character is ExOR with the register contents. Then the result
is shifted in the direction of the least significant bit (LSB), with a zero filled into the most significant bit
(MSB) position. The LSB is extracted and examined. If the LSB was a 1, the register is then ExOR with
the fixed value
0xA001. If the LSB was a 0, no ExOR takes place.
This process is repeated until eight shifts have been performed. After the last (eight) shift, the next
8bit char is ExOR with the register’s current value, and the process repeats for eight more shifts as
described above. The final content of the register, after all the bytes of the message have been ap-
plied, is the CRC value.
When the CRC is appended to the message, the low-order byte is appended first, followed by the
high-order byte.
Example for CRC calculating for the frame: "0x02 0x07"
MSB
LSB
Start CRC
1111
1111
1111
1111
0xFFFF
1.char
0000
0000
0000
0010
0x02
ExOR
CRC
1111
1111
1111
1101
1.shift right
0111
1111
1111
1110
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1101
1111
1111
1111
2.shift right
0110
1111
1111
1111
0xA001
1010
0000
0000
0001
ExOR
CRC
1100
1111
1111
1110
3.shift right
0110
0111
1111
1111
⇒
0 = no ExOR
4.shift right
0011
0011
1111
1111
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1001
0011
1111
1110
5.shift right
0100
1001
1111
1111
⇒
0 = no ExOR
6.shift right
0010
0100
1111
1111
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1000
0100
1111
1110
7.shift right
0100
0010
0111
1111
⇒
0 = no ExOR
8.shift right
0010
0001
0011
1111
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1000
0001
0011
1110
2.char
0000
0000
0000
0111
0x07
ExOR
CRC
1000
0001
0011
1001
1.shift right
0100
0000
1001
1100
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1110
0000
1001
1101
2. shift right
0111
0000
0100
1110
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1101
0000
0100
1111
3. shift right
0110
1000
0010
0111
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1100
1000
0010
0110
4. shift right
0110
0100
0001
0011
⇒
0 = no ExOR
5. shift right
0011
0010
0000
1001
⇒
1 = ExOR
0xA001
1010
0000
0000
0001
ExOR
CRC
1001
0010
0000
1000
6.shift right
0100
1001
0000
0100
⇒
0 = no ExOR
7.shift right
0010
0100
1000
0010
⇒
0 = no ExOR
8.shift right
0001
0010
0100
0001
⇒
0 = no ExOR
result
1
2
4
1
CRC = 0x41 0x12
Содержание Agile
Страница 1: ...Agile Modbus Communication manual Frequency inverter 230V 400V ...
Страница 2: ......
Страница 5: ...Modbus Agile 5 02 2011 13 2 Warning Messages Application 76 13 3 Error Messages 76 INDEX 77 ...
Страница 44: ...Modbus Agile 02 2011 44 Handling of Data Sets Cyclic Writing ...
Страница 69: ...Modbus Agile 69 02 2011 10 2 1 Statemachine diagram ...
Страница 78: ......
Страница 79: ......