45
Appendix B: Calculation of Elastic
Buffer Over/Underflow Rate
B.1 General
An important consideration in many applications is bit count integrity (BCI). In
synchronous data transmission systems, bits can be “lost” or “gained” when the
receive clock rate is not equal to the transmit rate. “Loss” or “gain” is unacceptable,
and can cause disruptions lasting several seconds, especially in systems using data
multiplexors, or in secure systems protected by the DES or other encryption
algorithms.
Bits are “lost” when the receive clock is slightly slower than the transmit clock,
and are “gained” in the reverse case. The generic designation for these effects is
“slippage.” A measure of slippage severity is the slippage rate—the number of
slippage events per time interval.
B.2 Slippage Rate without Buffers
When no buffers are used, a slippage event occurs when a bit is lost/gained. The
slippage rate is nominally equal to the difference in clock rates, times the data rate
(bits/second).
For example, when the clock accuracy is 100 parts per million (ppm), the worst-
case clock difference is 200 ppm. Therefore, at a data rate of 64 kbps:
Slippage Rate = 64 x 10
3
x 200 x 10
-6
=12.8 bits/second
B.3 Slippage Rate with Buffers
When FIFO buffers are used, slippage occurs only when the number of bits read
from the FIFO differs from the number of bits written into it.
The FIFO buffers are preset to the middle of their capacity. The Modular
Modem Eliminator has 256-bit buffers, so the buffers are preset to 128 bits. An
overflow or underflow event will therefore take place only after approximately
128 bits are “lost” or “gained,” respectively.
Under the conditions assumed in the example of
Section B.2
, the slippage rate
decreases to one in every 10 seconds. Although this is far from ideal, it means that
in a half-duplex application, messages having a length of up to 640 kb can be safely
APPENDIX B: Calculation of Elastic Buffer Over/Underflow Rate
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