DESCRIPTION AND OPERATION
I/O CIRCUIT CONNECTIONS
I-E96-316A
2 - 5
Digital I/O Buffer
The digital I/O buffer block is a buffer and register that hold
the values of the digital inputs and outputs. The slave
expander bus interface writes digital data to the register for
output by the driver block circuits, and reads the digital input
values from the buffer.
I/O CIRCUIT CONNECTIONS
The I/O signals connect to the 30-pin card edge connector P3
of the QRS using a termination cable from a TU/TM. It also
su24 VDC power to operate the analog output circuits.
SLAVE EXPANDER BUS
The INFI 90 slave expander bus is a high speed synchronous
parallel bus. It provides a communication path between master
modules and slave modules. The master module provides the
control functions and the slave module provides the I/O func-
tions. The P2 card edge connector of the slave and master mod-
ule connect to the bus.
The slave expander bus is twelve parallel signal lines located
on the Module Mounting Unit (MMU) backplane. A 12-position
dipshunt placed in a connection socket on the MMU backplane
connects the bus between the master and slave modules. Cable
assemblies can extend the bus to six MMUs.
A master module and its slaves form an individual subsystem
within a Process Control Unit (PCU). The slave expander bus
between master/slave subsystems must be separated. Leaving
a dipshunt socket empty or not connecting the MMUs with
cables separates them.
UNIVERSAL SLAVE EXPANDER BUS INTERFACE
The QRS uses a custom gate array to perform the slave
expander bus interface function. All the control logic and com-
munication protocol are built into an integrated circuit (IC).
This IC provides the following functions:
•
Address comparison and detection.
•
Function code latching and decoding.
•
Read strobe generation.
•
Data line filtering of bus signals.
•
On-board bus drivers.
