List of Figures
No.
Title
Page
WBPEEUI240756A0
v
1-1.
INFI 90 OPEN Communication Levels .....................................................................1-2
2-1.
Functional Block Diagram......................................................................................2-2
2-2.
Analog Input Filter and Overvoltage Protection .......................................................2-4
2-3.
FSK Input Circuit...................................................................................................2-5
2-4.
Analog to Digital Conversion Circuitry ....................................................................2-6
2-5.
FSK Signal and Decoded Digital Equivalent ............................................................2-8
2-6.
Field Bus Mode ......................................................................................................2-8
2-7.
FSK Analog Point-to-Point Mode ...........................................................................2-10
3-1.
IMFEC11/12 Switch and Jumper Locations ...........................................................3-3
4-1.
Connecting the Type STT02/03 Terminal to the NTFB01 Termination Unit .............4-2
4-2.
IMFEC1
Status LED ............................................................................................4-3
A-1.
NTAI05 Input Circuit............................................................................................. A-1
A-2.
NTAI05 Cable Connections .................................................................................... A-2
A-3.
NTAI05 Terminal Assignments .............................................................................. A-3
B-1.
NIAI04 Input Circuit ............................................................................................. B-1
B-2.
NIAI04 Terminal Assignments ............................................................................... B-1
B-3.
NIAI04 Cable Connections ..................................................................................... B-2
C-1.
NTFB01 I/O Module Input Circuit ......................................................................... C-1
C-2.
NTFB01 Terminal Assignments ............................................................................. C-2
C-3.
NTFB01 Cable Connections ................................................................................... C-2
List of Tables
No.
Title
Page
1-1.
Glossary of Terms and Abbreviations ......................................................................1-4
1-2.
Reference Documents ............................................................................................1-5
1-3.
Nomenclature ........................................................................................................1-6
1-4.
Related Hardware ..................................................................................................1-6
1-5.
Specifications.........................................................................................................1-7
2-1.
Firmware Revision Level Requirements ...................................................................2-7
3-1.
Firmware Revision Level Requirements ...................................................................3-2
3-2.
Sample Address Switch Settings (S1) ......................................................................3-4
3-3.
IMFEC11 Jumper Settings .....................................................................................3-4
3-4.
Termination Descriptions .......................................................................................3-5
4-1.
IMFEC1
Status LED States ..................................................................................4-3
5-1.
IMFEC1
Error Codes ...........................................................................................5-1
5-2.
Smart Transmitter Error Codes ..............................................................................5-2
5-3.
P1 Edge Connector Pin Assignments ......................................................................5-4
5-4.
P2 Edge Connector Pin Assignments ......................................................................5-4
5-5.
P3 Input Signal Pin Connections ............................................................................5-4
5-6.
J1 Pin Assignments................................................................................................5-4
6-1.
Preventive Maintenance Schedule ..........................................................................6-1
A-1.
NTAI05 Dipshunt Settings..................................................................................... A-2
B-1.
NIAI04 Dipswitch Settings ..................................................................................... B-2