VIA 693/693A AT MAINBOARD
AWARD BIOS SETUP
4-7
4.6
CHIPSET FEATURES SETUP
ROM PCI / ISA BIOS (2A6LGP8B)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Bank 0/1 DRAM Timing
: SDRAM 10ns Auto Detect DIMM / PCI Clk
: Enabled
Bank 2/3 DRAM Timing
: SDRAM 10ns Spread Spectrum Modulated
: Disabled
Bank 4/5 DRAM Timing
: SDRAM 10ns CPU Host / PCI Clock
: Default
SDRAM Cycle Length
: 3
DRAM Clock
: AGP CLK
Memory Hole
: Disabled
Read Around write
: Disabled
Concurrent PCI/Host
: Disabled
System BIOS Cacheable
: Disabled
Video RAM Cacheable
: Disabled
AGP Aperture Size
: 64M
AGP – 2X Mode
: Enabled
OnChip USB
: Enabled
ESC : Quit
:
Select Item
USB Keyboard Support
: Disabled
F1 : Help
PU/PD/+/- : Modify
F5 : Old Values
(Shift)F2 : Color
F7 : Load Setup Defaults
Fig. 4-5 CHIPSET FEATURES SETUP screen.
WARNING :
The selection fields on this screen are provided for the professional
technician who can modify the Chipset features to meet some specific
requirement. If you do not have the related technical background, do
not attempt to make any change except the following items.
Bank 0/1, 2/3, 4/5 DRAM Timing :
(Default Setting: SDRAM 10ns)
The DRAM timing of Bank 0/1, 2/3, 4/5 in this field is used to adjust the access
time of the memory subsystem. Depending on different memory chips installed on
the board, you need to select different timing so that your PC system will be
working properly. Different timing will lead to different system performance.
However, improper setting in this field may cause system unstable. Please check
your DRAM module carefully before you may proceed with the setting.
