SBC8166 Socket370 Full-size CPU Card Series User’s Manual
Award BIOS Reference
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POST (hex)
Description
05
1. Keyboard Controller Self-Test
2. Enable Keyboard Interface
06
Reserved
07
Verifies the basic R/W functionality of CMOS
BE
Program defaults values into chipset according to the
MODBINable Chipset Default Table
09
1.
Program the configuration register of Cyrix CPU
according to the MODBINable Cyrix Register Table
2.
OEM specific cache initialization (if needed)
0A
1.
Initialize the first 32 interrupt vectors with
corresponding Interrupt handlers
2.
Initialize INT no from 33-120 with Dummy(Spurious)
Interrupt Handler
3.
Issue CPUID instruction to identify CPU type
4.
Early Power Management initialization (OEM
specific)
z
This POST code is for boot block
POST (hex)
Description
C0
1.
Turn off OEM specific cache, shadow.
2.
Initialize all the standard devices with default values
standard devices includes:
-DMA controller (8237)
-Programmable Interrupt Controller (8259)
-Programmable Interval Timer (8254)
-RTC chip
C1
Auto-detection of onboard DRAM & Cache
C3
Checking checksum of compressed code
C5
Copy the BIOS from ROM into E0000-FFFFF shadow
RAM so that POST will go faster
01
Clear base memory 0~640K
0C
Initial interrupt vector 00-1FH
0D
Initial ISA VGA
41H
Enable FDD and detect media type
FFH
Boot from FDD
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