Atmel AT90S8414, Руководство пользователя

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4-14
AT90S8414 Preliminary
The SRAM Data Memory - Internal and External
The following figure shows how the AT90S8414 SRAM Memory is organized:
Register File SRAM
R0 $0000
R1 $0001
R2 $0002
¼ ¼
R29 $001D
R30 $001E
R31 $001F
Internal SRAM start
®
$0020
$0021
¼
$011D
$011E
Internal SRAM end
®
$011F
External SRAM start
®
$0120
$0121
…
$FFFE
External SRAM end
®
$FFFF
Figure 7: SRAM Organization
The 288 top SRAM Memory locations address both the Register file and the internal data SRAM. The first 32 locations
address the register file, and the next 256 locations address the internal data SRAM. An optional external data SRAM can
be placed in the same SRAM memory space. Following the last address of the internal SRAM space and up to 64K - 1, is
the external data SRAM address area.
When the addresses accessing the SRAM memory space exceeds the internal data SRAM locations, the external data
SRAM is accessed using the same instructions as for the internal data SRAM access. When the internal data SRAM is
accessed, the read and write strobe pins ( RD and WR ) are inactive during the whole access cycle. The external data
SRAM physical address locations corresponding to the internal data SRAM addresses can not be reached by the CPU.
External SRAM operation is enabled by setting the SRE bit in the MCUCR register. See Page 4-32 for details.
The five different addressing modes for the SRAM data memory cover: Direct, Direct with Displacement, Indirect,
Indirect with Pre-Decrement and Indirect with Post-Increment. In the register file, registers R26 to R31 feature the
indirect addressing pointer registers.
The Direct with Displacement mode features a 63 address locations reach from the base address given by the Y or Z-
register.
When using register indirect addressing modes with automatic pre-decrement and post-increment, the address registers X,
Y and Z are decremented and incremented.