EVAL-ADAU1467Z
UG-1134
Rev. A (Draft) | Page 39 of 55
Figure 101. SDP-EI3 Connector—Slave Input from a Master Controller Board Schematic
USB 5V
USB 5V
SPORT1_D0
SPORT1_FS
SPORT0_D0
SPORT0_FS
SPORT0_CLK
I/O SUPPLY FROM
MASTERBOARD
OPEN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
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20
21
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42
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47
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101
102
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105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
J2
HIROSE_FX8-120S-SV(21)
120PIN SOCKET
D2
LRCLK_OUT1
BCLK_OUT1
SDP_MCLK_IN
SDATA_IN0
IOVDD
5V00_UNREG
SDATA_OUT1
LRCLK_IN0
BCLK_IN0
SDP_TDM8
MISO
SCLK
SS
MOSI
MISO
SCLK
SDP_RESET
SDP_RESET
EI3 1A SLAVE
DAU_MCLK
SPORT1_CLK
SPORT1_D1
SPORT0_D1
GPIO0
GPIO2
GPIO4
SDA0'
SCL0'
GPIO1
GPIO3
GPIO5
RESET_IN
R42
0805
R5
33R2
OPEN
R41
0805
R39
475R
R27
49R9
R6
OPEN
0805
RESET_OUT’
C2
47µF
+
J20
DRAFT
Содержание SigmaDSP ADAU1463
Страница 44: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 44 of 55 Figure 110 EVAL ADAU1467ZLayout Top Copper D R A F T...
Страница 45: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 45 of 55 Figure 111 EVAL ADAU1467Z Layout Layer 2 Ground D R A F T...
Страница 47: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 47 of 55 Figure 113 EVAL ADAU1467Z Layout Layer 4 Power D R A F T...
Страница 48: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 48 of 55 Figure 114 EVAL ADAU1467Z Layout Layer 5 Ground D R A F T...
Страница 49: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 49 of 55 Figure 115 EVAL ADAU1467Z Layout Bottom Copper D R A F T...
