EVAL-ADAU1467Z
UG-1134
Rev. A (Draft) | Page 29 of 55
EVALUATION BOARD HARDWARE
IC DESCRIPTIONS
Table 5. IC Descriptions
Reference
Functional Name
Description
U1
Clock buffer, 1:9
Buffers the master clock signal (MCLK) for distribution to multiple ICs and to
headers.
U2
audio processor Acts as an audio hub for all audio inputs and outputs in the system and performs
digital signal processing on those signals.
U3
audio codec
Converts analog audio inputs to digital data for the
processor and takes
digital data back from the
to convert to analog audio output signals.
U4
junction gate field-effect
transistor (JFET) input single op-amp
Buffers the common-mode output of the
codec for distribution to the
analog filters. This signal is the bias reference voltage for the
amplifiers,
which have a single ended supply voltage.
U5
reset voltage
supervisor
Generates a master reset signal for the
if the RESET
push-button (S1) is pressed, if
sends a reset command via the USBi, or
if the unregulated 5 V dc supply voltage drops below 3.08 V dc.
U7
74ACT04SC hexadecimal inverter
Buffers logic signals and drives status LEDs.
U8, U9, U11,
U12 to U16
dual, low power, low noise,
and low distortion rail-to-rail output
amplifier
Implements the analog audio filtering required for the stereo line inputs and
outputs.
U10
Microchip 25AA1024 serial EEPROM
Stores data, allowing the
to perform a self boot operation.
U17
3.3 V, dc LDO
voltage regulator
Accepts the unregulated dc supply voltage between 5 V and 7 V that is provided to
connector J16 and regulates the supply voltage down to 3.3 V.
STATUS LED DESCRIPTIONS
Table 6. LED Descriptions
Reference Functional Name
Description
D1
SDP master
Not used.
D2
SDP slave
Not used.
D3
Self boot
status LED
Illuminates when the self boot switch (Position 1 of Switch S3) is set to the on position, signifying that
a self boot operation is to be executed on the rising edge of the
RESET signal or when the
is powered up. LED D3 does not illuminate when the self boot slide switch is set to off,
which signifies that no self boot operations is to occur.
D4
RESET
Illuminates when the master reset signal being generated by U5 is asserted low. This occurs when the
supply voltage IOVDD drops below 3.08 V, when reset is asserted by the USBi from within the
software, or when the reset switch (S1) is pressed.
D5
USB_RESET
USB_RESET illuminates when reset is asserted by the USBi from within the
D6
Mic canvas header
microphone
power status
Illuminates when power for the microphones is supplied to the mic canvas connector.
D7
MP14
Not used.
D8
USBi connected
Illuminates when the USBi is recognized by Windows after the USBi is connected to the Control Port
J1 and the USB port of the computer.
D9
3.3 V supply status
LED
Illuminates when the output of the
LDO voltage
regulator has reached a level sufficient to exceed the V
IH
logic high level input of the 74ACT04SC
inverter. (When this LED is illuminated, it does not guarantee that the LDO voltage output is 3.3 V. It
only shows that the LDO is about 2 V or greater. To perform a more detailed measurement of the LDO
output level, measure the voltage on the 3V3_A test point.)
Содержание SigmaDSP ADAU1463
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Страница 47: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 47 of 55 Figure 113 EVAL ADAU1467Z Layout Layer 4 Power D R A F T...
Страница 48: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 48 of 55 Figure 114 EVAL ADAU1467Z Layout Layer 5 Ground D R A F T...
Страница 49: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 49 of 55 Figure 115 EVAL ADAU1467Z Layout Bottom Copper D R A F T...
