Analog Devices SigmaDSP ADAU1463 Скачать руководство пользователя

Страница: 16 / 55

UG-1134

EVAL-ADAU1467Z

Rev. A (Draft) | Page 16 of 55

Figure 38. Serial Ports Connections to the

AD1937

Codec

Add screen shots of SPORT tabs (in, out, SDATAIOx)

AD1937

Boot Mode

Expand on this.

The

AD1937

is capable of running in standalone mode or being

booted and configured through its I

C control port. Switch S2

selects the boot mode of the

AD1937

codec as shown in Figure 39,

and this switch is set to STANDALONE by default. When
running in standalone mode, the serial ports of the

AD1937

are

configured as clock slaves. Therefore, the corresponding serial
ports on the

ADAU1467

must be set as clock masters. By default,

all serial ports on the

ADAU1467

are set as clock masters when a

new project is created in

SigmaStudio

Standalone mode eliminates the need for the user to configure
the registers of the

AD1937

via its I

C port. This mode fixes the

sample rate of the

AD1937

at 44.1 kHz or 48 kHz. The analog

audio inputs and outputs on the EVAL-ADAU1467Z can be
distorted or silent if a sample rate other than 44.1 kHz or 48 kHz is
used for the

ADAU1467

serial ports.

The alternate I

C master port pins of

ADAU1467

are connected

to the I

C control port of the

AD1937

when Switch S2 is set to I

boot mode; this requires reconfiguration of the master control
port from SPI to I

C and enabling the alternate I

C port on the

MP24 pin and MP25 pin. This configuration is beyond the scope of
this user guide; however, it enables the

ADAU1467

to boot and

configure all of the control registers of the

AD1937

. When

configured manually, the codec is flexible and can run at
any sample rate up to 192 kHz.

Figure 39.

AD1937

CODEC Boot Mode Selection Switch S2

Booting the CODEC from the DSP Using I

How to config to 96 kHz.
Create an XML file manually or using the following steps
1.

Add AD1937 block to hardware config tab to access GUI for
registers.

Configure the CODEC

Copy commands from output window to sequence window

•

Serial port & SDATAIOx mapping

Setting up mapping for ADCs/DACs

CODEC boot mode switch

Creating a XML file

Adding boot block to SigmaStudio schematic

8-CHANNEL

DAC

(4 × I2S)

4-CHANNEL

ADC

(2 × I2S)

AD1937
CODEC

ANALOG OUT

ANALOG IN

DAC FRAME SYNC

DAC BIT CLOCK

OUTPUT CHANNELS 0-1

OUTPUT CHANNELS 4-5

ADC FRAME SYNC

ADC BIT CLOCK

INPUT CHANNELS 32-33

INPUT CHANNELS 36-37

OUTPUT CHANNELS 8-9

OUTPUT CHANNELS 12-13

15786-

081

LRCLK_OUT0

BCLK_OUT0

SDATA_OUT0

LRCLK_IN2

BCLK_IN2

SDATA_IN2

SDATAIO4

SDATAIO6

SDATAIO7

ADAU1467

SDATAIO5

DRAFT

Содержание SigmaDSP ADAU1463

Страница 1: ...is evaluation board to evaluate the ADAU1463 select the ADAU1463 block see the SigmaStudio section rather than the ADAU1467 as shown in Figure 11 Performing this action informs the compiler to limit t...

Страница 2: ...Communications in SigmaStudio 8 Creating a Basic Signal Flow 9 Downloading the Program to the DSP 11 Evaluation Board Features 14 Reset 14 AD1937 Codec 14 Serial Audio Data Input and Output 17 Multip...

Страница 3: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 3 of 55 EVAL ADAU1467Z EVALUATION BOARD PHOTOGRAPH Figure 1 D R A F T...

Страница 4: ...r and execute the executable Follow the prompts and accept the license agreement to install the software The drivers for the USBi are installed automatically by the SigmaStudio installer This may be c...

Страница 5: ...as well as other supporting ICs When the power supply is connected properly LED D9 illuminates Figure 4 DC Power Supply Plug and Cable To power up the evaluation board take the following steps 1 Conn...

Страница 6: ...e single ended and line level with a maximum voltage of 2 8 V p p 1 0 VRMS The tip of the plug is the left channel of audio the ring is the right channel of audio and the sleeve is the common or groun...

Страница 7: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 7 of 55 Figure 9 Location of Stereo Output OUT1 J12 and Stereo Input IN1 J14 OUT1 IN1 D R A F T...

Страница 8: ...4 Ensure that SigmaStudio can detect the USBi on the USB port of the PC as follows a When SigmaStudio detects the USBi the background of the USB label is green in the USB Interface box see Figure 12 F...

Страница 9: ...This configuration matches the analog audio source hardware connections shown in Figure 7 and Figure 8 therefore no modifications are required Figure 16 Input Block Selection Figure 17 Input Block b...

Страница 10: ...and drag it into the project space to the right of the toolbox Figure 21 Single Volume Block Selection 2 By default the volume control block has one input and one output in other words it is a single...

Страница 11: ...d and the audio passes from the analog input to the analog output To change the volume in real time click and drag the volume control slider in the Schematic tab If the Output window is open at the ti...

Страница 12: ...SigmaStudio The Simulation Stimulus and Simulation Probe blocks may be used to visualize the magnitude and phase response of a linear chain of blocks The response is calculated on the host PC and is...

Страница 13: ...on the Stimulus block to begin the simulation 6 Move the slider on the Medium Size Eq block to control the filter gain Click on the blue icon at the top of the filter block to change other parameters...

Страница 14: ...IOx pin are connected to the ADCs of the AD1937 and one of the four serial output ports and three SDATAIOx pins are connected to the digital to analog converts DACs of the AD1937 Each serial data pin...

Страница 15: ...hannels output serial ports and output jacks is shown in Table 2 See the Configuring the SDATAIOx Pins for the ADCs and DACs section for the configuration of the SDATAIOx pins Table 2 Mapping of Sigma...

Страница 16: ...the I2 C control port of the AD1937 when Switch S2 is set to I2 C boot mode this requires reconfiguration of the master control port from SPI to I2 C and enabling the alternate I2 C port on the MP24 p...

Страница 17: ...l Input Port Headers J8 Figure 41 Serial Output Port Headers J9 and J19 Figure 42 Power and CLKOUT Header J8 Figure 43 MCLK Input Header J3 MULTIPURPOSE PINS MPx The multipurpose pins on the ADAU1467...

Страница 18: ...Access Points Multipurpose Pin Connection Access Point LRCLK_OUT1 MP5 Input to inverter LED D4 TP56 LRCLK_OUT3 MP9 Input to inverter LED D3 TP48 LRCLK_IN1 MP11 Input to inverter LED D5 TP29 LRCLK_IN2...

Страница 19: ...The 10 bit auxiliary analog to digital converter ADC on the ADAU1467 eliminates the need for a microcontroller in many applications by using analog control signals as user interface devices For exampl...

Страница 20: ...Add two DSP Readback blocks to the project and set their numeric format as follows a From the Basic DSP DSP Function folder click DSP Readback see Figure 52 and drag it into the project space to the r...

Страница 21: ...e control slider in SigmaStudio to change the filter gain in real time while the project is running The schematic see Figure 56 shows audio from input Channel 0 and Channel 1 connected to the input of...

Страница 22: ...IFOUT pin and converts it to an optical signal Figure 57 shows the locations of the optical input connector and the optical output connector S PDIF Optical Transmitter and Receiver The ADAU1467 S PDIF...

Страница 23: ...ab then click the IC 1 ADAU1467 Register Controls tab at the bottom of the window see Figure 60 Figure 60 IC 1 ADAU1467 Register Controls Tab b To access the SPDIF tab click the right arrow to scroll...

Страница 24: ...g the S PDIF Transmitter Routing Matrix Register b From the dropdown menu that appears select From DSP to choose the signal coming from the DSP core see Figure 70 Figure 70 Routing the DSP Core Output...

Страница 25: ...el Mapping ASRC Output Corresponding Channels on ASRC Input Block in SigmaStudio ASRC 0 Channel 0 and Channel 1 ASRC 1 Channel 2 and Channel 3 ASRC 2 Channel 4 and Channel 5 ASRC 3 Channel 6 and Chann...

Страница 26: ...ct space to the right of the toolbox Figure 77 E2Prom IC Selection in SigmaStudio 2 Connect the green input pin of the E2Prom IC to one of the available blue output pins of the USB Interface block 3 S...

Страница 27: ...Writing to the EEPROM Through the ADAU1467 Master SPI Port Figure 80 External Memory Erase and Overwrite Warning Window 7 An EEPROM Properties dialog box appears Enter the appropriate values into the...

Страница 28: ...en performed and the ADAU1467 runs the program stored in the EEPROM SLAVE CONTROL PORT The Control Port header J1 is a 10 pin header designed to work with the EVAL ADUSB2EBZ or USBi The SPI signals ar...

Страница 29: ...pts the unregulated dc supply voltage between 5V and 7V that is provided to connector J16 and regulates the supply voltage down to 3 3V STATUS LED DESCRIPTIONS Table 6 LED Descriptions Reference Funct...

Страница 30: ...TAIO0 MP16 SDATAIO1 MP17 SDATAIO2 MP18 SDATAIO3 MP19 IOVDD DGND BCLK_IN0 LRCLK_IN0 MP10 SDATA_IN0 BCLK_IN1 LRCLK_IN1 MP11 SDATA_IN1 THD_M THD_P BCLK_IN2 LRCLK_IN2 MP12 SDATA_IN2 BCLK_IN3 LRCLK_IN3 MP1...

Страница 31: ...DD2 DACL3N DACR3N DACL4N DACR4N 5 17 45 51 62 32 DVDD DACL1N DACR1N DACL2N 2 3 6 8 10 12 36 38 40 42 47 52 61 7 9 11 13 37 39 41 43 DACR2N U3 A AD1937 C84 47uF C83 47uF C29 0 10uF C24 0 10uF C49 5 6nF...

Страница 32: ...n Switch Schematic Figure 87 Analog Common Mode Bias Reference Schematic CW 2 1 3 R25 10k0 LINEAR CW 2 1 3 R26 10k0 LINEAR IOVDD AUXADC0 AUXADC1 R70 2k43 R34 2k43 1 2 3 S8 MC_XLAT SS2_M MP24 MC_LED_BL...

Страница 33: ...RMZ 6 5 7 U12 B ADCR1N ADCR1P ADCL1N ADCL1P 5V00_UNREG AMP_REF AMP_REF ADCR1P ADCR1N ADCL1P ADCL1N R102 100k C96 100pF C90 0 10 F C89 100pF C37 1 0nF C38 1 0nF C31 1 0nF C32 1 0nF C95 10 F R101 4k99 R...

Страница 34: ...0nF C138 10 F R145 4k99 R144 4k99 R130 100R R37 4k99 C126 330pF R129 4k99 R135 49R9 C124 10 F R123 49R9 C121 10 F C53 100pF C117 10 F R126 4k99 C116 330pF R125 4k99 R124 49R9 C115 10 F R121 49R9 C113...

Страница 35: ...0 R90 10k0 R87 4k99 C82 33pF C73 33pF C68 33pF C85 82pF R67 4k99 R66 49R9 C71 10 F C65 0 10 F R53 100k C63 10 F R56 49R9 R59 4k99 C70 82pF R61 10k0 R82 10k0 R86 4k99 C81 33pF RING SLEEVE TIP J18 R142...

Страница 36: ...4 CHANNELS 12 TO 13 R81 10k0 R85 10k0 R84 4k99 C80 33pF C67 33pF C110 33pF C78 82pF R58 4k99 R55 49R9 C62 10 F C133 0 10 F R141 100k C136 10 F R138 49R9 R119 4K99 C107 82pF R116 10k0 R111 10k0 R110 4k...

Страница 37: ...N1 SDATA_IN1 BCLK_IN1 MC_TDM8_SDATAIO1_MP17 MC_LED_BLANK 15786 094 C4 0 10 F C56 0 10 F C57 0 10 F C3 0 10 F C97 0 10 F C55 0 10 F C58 0 10 F C6 0 10 F IOVDD 15786 095 DC IN 5V TO 6V 7V DC MAX 2 1 J16...

Страница 38: ...49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 11...

Страница 39: ...60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119...

Страница 40: ...SCLK_M MOSI_M SS_M MISO_M SCLK_M MOSI_M MISO_M SS_M IOVDD R76 10k0 C76 0 10 F 5 6 7 8 1 2 3 4 S3 SELFBOOT IOVDD MP15 MP7 MP14 ON 4 POS DIP SWITCH R78 10k0 R77 10k0 R47 10k0 R44 10k0 12 10 8 11 9 7 5 3...

Страница 41: ...e 106 TOSLINK Optical Input Output Connector Schematic USB 5 VOLTS USB CONNECTED 1 3 5 7 9 2 4 6 8 10 J1 HEADER_10WAY_POL R31 1k00 D8 R68 10k0 USB_RESET MISO SCLK SS MOSI IOVDD 15786 103 C98 0 10 F C1...

Страница 42: ...MIC_POWER INV_MIC_PWR R48 475R D6 13 12 U7 F WRITEBACK R50 475R D7 1 2 7 14 U7 A 3V3_A R79 475R D9 IOVDD 9 8 U7 D SELFBOOT R43 475R D3 IOVDD D4 RESET 5 U7 C 6 R45 475R D5 USB_RESET 11 U7 E 74ACT04SC_H...

Страница 43: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 43 of 55 Figure 109 EVAL ADAU1467Z Layout Top Assembly and Silkscreen D R A F T...

Страница 44: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 44 of 55 Figure 110 EVAL ADAU1467ZLayout Top Copper D R A F T...

Страница 45: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 45 of 55 Figure 111 EVAL ADAU1467Z Layout Layer 2 Ground D R A F T...

Страница 46: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 46 of 55 Figure 112 EVAL ADAU1467Z Layout Layer 3 Signal Power D R A F T...

Страница 47: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 47 of 55 Figure 113 EVAL ADAU1467Z Layout Layer 4 Power D R A F T...

Страница 48: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 48 of 55 Figure 114 EVAL ADAU1467Z Layout Layer 5 Ground D R A F T...

Страница 49: ...EVAL ADAU1467Z UG 1134 Rev A Draft Page 49 of 55 Figure 115 EVAL ADAU1467Z Layout Bottom Copper D R A F T...

Страница 50: ...UG 1134 EVAL ADAU1467Z Rev A Draft Page 50 of 55 Figure 116 EVAL ADAU1467Z Layout Bottom Assembly Viewed from Above D R A F T...

Страница 51: ...ramic capacitor 6 3 V X7R 1210 47 0 F Murata GCM32ER70J476KE19L 8 C30 C33 C36 C53 C89 C96 C118 C127 Multilayer ceramic capacitors 50 V NP0 0402 100 pF Murata ENA GRM1555C1H101JA01D 8 C31 C32 C34 C35 C...

Страница 52: ...le Not applicable Not applicable 1 R20 Chip resistor 1 167 mW thick film 0402 0 47 Panasonic ERJ ERJ 2BQFR47X 5 R21 R28 R34 R70 R72 Chip resistors 1 63 mW thick film 0402 2 43 k Vishay Dale CRCW04022K...

Страница 53: ...C17 C20 C22 C24 C26 to C29 C40 C41 C43 C45 C47 C50 C52 C55 to C60 C64 C65 C72 C75 to C77 C90 C92 C97 C98 C112 C114 C119 C122 C128 C133 C134 Multilayer ceramic capacitors 16 V X7R 0402 0 10 F Murata EN...

Страница 54: ...way shroud polarized headers 2 5 3M N2510 6002RB 1 J10 TOSLINK 16 Mpbs optical receiver Everlight Americas PLR135 T10 1 J11 120 pin header 0 6 mm Hirose Electric FX8 120P SV1 91 6 J12 to J18 Stereo m...

Страница 55: ...ion Boardor terminationof this Agreement Customer agreesto promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the E...

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