Evaluation Board User Guide
UG-173
Rev. B | Page 11 of 24
EVALUATION BOARD
The FIFO provides all of the support circuitry required to accept
two channels of an ADC’s digital parallel CMOS outputs. Each
of the various functions and configurations can be selected by
properly connecting various jumpers (see Table 4). When using
this in conjunction with an ADC evaluation board, it is critical
that the signal sources used for the analog input and clock have
very low phase noise (<1 ps rms jitter) to realize the ultimate
performance of the converter. Proper filtering of the analog
input signal to remove harmonics and lower the integrated or
broadband noise at the input is also necessary to achieve the
specified noise performance.
See Figure 8 to Figure 18 for complete schematics and layout
diagrams.
POWER SUPPLIES
The FIFO board is supplied with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. Connect
the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to
63 Hz. The other end is a 2.1 mm inner diameter jack that connects
to the PCB at J301. On the PC board, the 6 V supply is then fused
and conditioned before connecting to the low dropout 3.3 V
linear regulator that supplies the proper bias to the entire board.
When operating the evaluation board in a nondefault condition,
J316 can be removed to disconnect the switching power supply.
This enables the user to bias the board independently. Use P302
to connect an independent supply to the board. A 3.3 V supply
is needed with at least a 1 A current capability.
CONNECTION AND SETUP
The FIFO board has a 120-pin (three rows of 40 pins each)
connector that accepts two 16-bit channels of parallel CMOS
inputs (see Figure 6). For those ADC evaluation boards that
have only an 80-pin (two rows of 40 pins each) connector, it is
pertinent that the lower two rows of the FIFO’s triple row
connector be connected in order for the data to pass to either
FIFO channel correctly. The top, or third row, is used to pass
SPI signals across to the adjacent ADC evaluation board that
supports this feature.
ROHDE & SCHWARZ,
SMHU,
2V p-p SIGNAL
SYNTHESIZER
ROHDE & SCHWARZ,
SMHU,
2V p-p SIGNAL
SYNTHESIZER
USB
CONNECTION
05
87
0
-0
0
6
HSC-ADC-EVALB-DCZ
FIFO DATA
CAPTURE
BOARD
PC
RUNNING
ADC
ANALYZER
–
+
3.3V
GN
D
VC
C
6V DC
2A MAX
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
CHB
PARALLEL
CMOS
OUTPUTS
EVALUATION
BOARD
CHA
PARALLEL
CMOS
OUTPUTS
XFMR
INPUT
CLK
SWITCHING
POWER
SUPPLY
SPI
SPI
SPI
BAND-PASS
FILTER
Figure 6. Example Setup Using Quad ADC Evaluation Board and FIFO Data Capture Board