INDEX
I-4
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
PPI_DIR_CTL signal,
PPI_FS3 signal,
programmable flags
PC0 (UART transmit),
,
PC1 (UART receive),
PC5-9 (LED2-6),
PD0-8 signals,
PD10-13,
PD7 (JP1),
PD9 (ERR),
,
,
PE0-15,
PF0-3 (SW13-10),
,
,
push buttons
See also switches by name (SWx)
diagram of locations,
R
Reduced Instruction Set Computing (RISC),
regulators,
reset
processor,
push button (SW9),
restriction, of the evaluation license,
RFS0 signal,
RFS2-3 signals,
RIGHT_IN signal,
RIGHT_OUT signal,
RS-232 connectors (J6),
RSCLK0 signal,
RSCLK2-3 signals,
RTS signal,
RX0 signal,
RXDx (receive data output) signals,
S
schematic, of ADSP-BF538F EZ-KIT Lite,
B-1
SCLKx signals,
,
SDRAM
connections,
default settings,
interface,
memory map,
optimum settings,
serial peripheral interface, See SPI, SPI signals
~SMS0 (SDRAM select) pin,
SPI
interface,
SPI0SEL1-7 signals,
SPI1SEL signal,
SPI2SEL signal,
SPISS signal,
SPORT0
interface,
,
,
SPORT1
interface,
SRAM,
See also internal memory
STB (standby control input) signals,
stereo input/output channels,
SW10-13 (PD13-10) push buttons,
SW14 (FCE enable) switch,
SW1 (audio/oscilloscope) switch,
SW3 (boot mode select) switch,
SW4 (UART) switch,
SW5 (push button enable) DIP switch,
,
Содержание EZ-KIT Lite ADSP-BF538F
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