UG-1055
EVAL-ADAU1777Z User Guide
Rev. 0 | Page 20 of 25
Control Port Interface
1
3
5
7
9
2
4
6
8
10
J1
HEADER_10WAY_POL
R15
2.67kΩ
R14
2.67kΩ
R19
OPEN
R16
OPEN
R17
OPEN
R22
OPEN
R21
OPEN
R20
OPEN
R23
10kΩ
R18
10kΩ
C22
0.10µF
IOVDD
BRD_RESET
ADDR0/SS
SCL/SCLK
SDA/MISO
ADDR1/MOSI
IOVDD
IOVDD
USB_5V
15054-
053
Figure 55.
Evaluation Board Schematic—Control Port Interface
15054-
056
Figure 56.
Evaluation Board Layout—Top Assembly