EVAL-ADAU1777Z User Guide
UG-1055
Rev. 0 | Page 13 of 25
PDM Modulator Output
has a 2-channel PDM modulator. The PDM
output and clock source are both located on the MP pins. To use
this functionality, set
ADC_SDATA0/PDMOUT/MP1
to
PDM
Modulator Output
and set
CLKOUT/ADC_SDATA1/MP6
to
Clock Output
. These settings can be found in the
Pin/Pad
Control
tab (see Figure 38).
1
5054
-038
Figure 38. PDM Modulator Output and Clock Output
The clock output is located on the J4 header, Pin 12. The PDM
output is located on the J4 header, Pin 10 (see Figure 39).
1
505
4-
0
39
PDM OUTPUT
CLOCK OUT
Figure 39. PDM Output and Clock Output Pins
MP PINS
The MP pin jumpers, Header J9, provide access to the MP pins
(MP0, MP1, MP2, MP3, and MP6) of the
, as well as
facilitate the use of the push-buttons on the
board. See Figure 53 for the pinout of the header. These jumpers
enable the use of the volume control, mute, and other capabilities
of the
To use the full functionality of the MP pins on the
change the selections in the drop-down boxes under the
Pin/Pad Control
tab, which is located in the
Hardware
Configuration
/
ADAU1777 Register Control
tab of
15054-
040
Figure 40. MP Pins Drop-Down Boxes
The MP pins, MP4 and MP5, are connected to the digital
microphone headers, J6 and J7.
SERIAL AUDIO INTERFACE
Serial audio signals in I
2
S, left justified, right justified, or TDM
format are available via the Serial Audio Interface Header J4.
This header also includes master clock input and output
connection pins. To use MCLK on the J4 header, first install a
resistor across the R2 pads. The R2 resistor is not populated
from the factory. To use an external MCLK, remove the R3
resistor from the board to eliminate contention from the XTAL
oscillator on the MCLK line (see Figure 41).
15054-
041
Figure 41. R2 and R3