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EVAL-ADAU1466Z

User Guide

UG-1135

Rev. 0 | Page 31 of 45

10k

Ω

LINEAR

10k

Ω

LINEAR

A_3V3

AUXADC0

AUXADC1

15789-

100

Figure 84. AUXADC Potentiometer Schematic

AD1938 CONFIGURED FOR

STANDALONE OPERATION

CLOCK SLAVE

MCLKI/XI

MCLKO/XO

DAC3L

DAC3R

DAC4L

DAC4R

PD/RST

DSDATA4

DSDATA3

DSDATA2

DSDATA1

DBCLK

DLRCLK

ASDATA2

ASDATA1

ABCLK

ALRCLK

CDATA

COUT

CCLK

CLATCH

DAC1L

DAC1R

DAC2L

DAC2R

FILTR

ADC1LP

ADC1LN

ADC1RP

ADC1RN

ADC2LP

ADC2LN

ADC2RP

ADC2RN

AD1938

AD1938YSTZ

C126

47µF

C125

47µF

C31

0.10µF

C27

0.10µF

C33
5.6nF

C32
390pF

R12

562Ω

C26

0.10µF

C25

0.10µF

C29

0.10µF

C30

0.10µF

C23

0.10µF

TP74

TP73

TP49

33R2

C115

10µF

C24

10µF

0Ω

R10

0Ω

R11

0Ω

RESET

[1,2,6]

DAC1L [5]

DAC1R [5]

DAC2L [5]

DAC2R [5]

DAC3L [5]

DAC3R [5]

[4] ADC1LP

[4] ADC1LN

[4] ADC1RP

[4] ADC1RN

FILTR

A_3V3

D_3V3

DAC4L [5]

DAC4R [5]

[1] SDATA_OUT0
[1] SDATA_OUT1
[1] SDATA_OUT2
[1] SDATA_OUT3

[4] ADC2LP

[4] ADC2LN

[4] ADC2RP

[4] ADC2RN

[1] LRCLK_OUT0

[1] BCLK_OUT0

[1] BCLK_IN0

[1] LRCLK_IN0

1466_CLKOUT

[1]

[1] SDATA_IN1
[1] SDATA_IN0

15789-

076

Figure 85.

AD1938

Audio Codec Schematic

Содержание EVAL-ADAU1466Z

Страница 1: ...6 and the ADAU1462 are functionally identical except that the ADAU1466 has more program and data memory than the ADAU1462 When using this evaluation board to evaluate the ADAU1462 in the Setting Up Communications in SigmaStudio section select the ADAU1462 block rather than the ADAU1466 as shown in Figure 15 Performing this action informs the compiler to limit the amount of memory allocated to matc...

Страница 2: ...ard 6 Connecting the Audio Cables 6 Setting Up Communications in SigmaStudio 8 Creating a Basic Signal Flow 9 Downloading the Program to the DSP 10 Adding S PDIF Input and Output to the Project 11 Controlling Volume with a Potentiometer 15 Using the Evaluation Board 18 Power Supply 18 Inputs and Outputs 18 Multipurpose MP Pins 20 Auxiliary ADC Pins 21 Communications Header 21 Self Boot 22 Reset 24...

Страница 3: ...EVAL ADAU1466Z User Guide UG 1135 Rev 0 Page 3 of 45 EVAL ADAU1466Z EVALUATION BOARD PHOTOGRAPH 15789 001 Figure 1 ...

Страница 4: ...oad the installer for and execute the executable Follow the prompts and accept the license agreement to install the software INSTALLING THE USBi EVAL ADUSB2EBZ DRIVERS SigmaStudio must be installed to use the USB interface USBi After the SigmaStudio installation is complete take the following steps 1 Connect the USBi to an available USB 2 0 port using the USB cable included in the evaluation board...

Страница 5: ...the computer check that both the yellow I2 C LED and the red power indicator LED are illuminated see Figure 7 2 In the Windows Device Manager under the Universal Serial Bus controllers section see Figure 8 check that Analog Devices USBi programmed is displayed 15789 009 Figure 7 State of USBi Status LEDs After Driver Installation 15789 010 Figure8 ConfirmingDriverInstallationUsingtheDeviceManager ...

Страница 6: ...789 012 Figure 10 Connecting the USBi to the Serial Peripheral Interface SPI Control Port Header CONNECTING THE AUDIO CABLES To connect the audio cables to the evaluation board take the following steps 1 Connect a stereo audio source to J9 IN1 with a standard 3 5 mm 1 8 inch stereo tip ring sleeve TRS audio cable The audio signals must be single ended and line level with a maximum voltage of 2 8 V...

Страница 7: ...EVAL ADAU1466Z User Guide UG 1135 Rev 0 Page 7 of 45 IN OUT 15789 015 Figure 13 Location of Stereo Output OUT1 J10 and Stereo Input IN1 J9 Rotated 90 ...

Страница 8: ... Figure 15 Adding an ADAU1466 4 Ensure that SigmaStudio can detect the USBi on the USB port of the PC as follows a When SigmaStudio detects the USBi the background of the USB label is green in the USB Interface box see Figure 16 15789 018 Figure 16 USBi Detected by SigmaStudio b When SigmaStudio cannot detect the USBi on the USB port of the PC the background of the USB label is red see Figure 17 T...

Страница 9: ...sdata 0 15 folder click Input see Figure 20 and drag it into the project space to the right of the toolbox see Figure 21 By default Channel 0 and Channel 1 are selected This configuration matches the analog audio source hardware connections shown in Figure 11 and Figure 12 therefore no modifications are needed 15789 022 Figure 20 Input Block Selection 15789 023 Figure 21 Input Block b Add two Outp...

Страница 10: ...and then from the dropdown menu that appears select Grow Algorithm 1 Gain HW Slew 1 see Figure 26 3 To delete the existing yellow connection wires that is the connections added in Step 3 of the Creating a Basic Signal Flow section click the connection wires Delete 15789 028 Figure 26 Growing the Volume Control to Two Channels 4 Connect the blocks as shown in Figure 27 15789 029 Figure 27 Completed...

Страница 11: ...f it was open when the Link Compile Download button was clicked 15789 033 Figure 31 Compiler Output Window ADDING S PDIF INPUT AND OUTPUT TO THE PROJECT The EVAL ADAU1466Z evaluation board has two optical S PDIF interfaces One interface is an input that converts the optical signal to an electrical signal which is sent to the ADAU1466 S PDIF receiver the SPDIFIN pin The other interface is an optica...

Страница 12: ... has occurred in the SPDIF RESTART box When this button is clicked the text displayed on the button changes to Restarts the audio once a re lock has occurred and the button color changes from red to green see Figure 37 15789 039 Figure 37 Activating the SPDIF_RESTART Register d To activate the S PDIF interface click Disabled in the SPDIF TX EN box When this button is clicked the text displayed on ...

Страница 13: ... right of the toolbox see Figure 46 15789 047 Figure 45 ASRC Input Block Selection 15789 048 Figure 46 ASRC Input Block Because the left and right signals of the S PDIF receiver are passing through the ASRC 0 the input to the DSP program is the Asrc Input block in SigmaStudio This naming con vention is such that all blocks in SigmaStudio are named from the perspective of the DSP core Therefore the...

Страница 14: ... that any signal input to the S PDIF optical receiver is copied and output on the S PDIF optical transmitter 15789 050 Figure 48 Signal Flow Including S PDIF Input via the ASRC and S PDIF Output Add a Filter To add a filter take the following steps 1 Add a Medium Size Eq block to the project space as follows a From the Filters Second Order Double Precision folder click Medium Size Eq see Figure 49...

Страница 15: ...ysical way to control parameters such gain filter corner frequency slew rate and compression level The following example demonstrates how a potentiometer can be configured as a stereo volume control 1 Create a new project in SigmaStudio and use the Hardware Configuration tab to use an ADAU1466 as describe above in the Setting Up Communications in SigmaStudio section 2 Add an input and two output b...

Страница 16: ...57 Figure 55 Activating Continuous Read Back iii For one of the DSP readback blocks change the numeric format used to decode and display of the value of the signal to 32 0 by typing 32 in the left format box then pressing the TAB key SigmaDSP uses a numeric format of 8 24 for audio signals 6 Add an Single Slew Ext Volume block to the project space as follows a From the Volume Controls Adjustable G...

Страница 17: ...ed fully clockwise this block reads back the maximum ADC output value of 1023 within the range of the component tolerance The native audio format of the ADAU1466 is 8 24 In this example the volume control multiplies the input signal by a fractional value ranging from 0 silence to 1 unity gain Therefore the control signal from the ADC must be left shifted 14 bits to scale the maximum value appropri...

Страница 18: ...io Standalone mode eliminates the need and ability of the user to configure the registers of the AD1938 via its SPI port This mode fixes the sample rate of the AD1938 at 44 1 kHz or 48 kHz It is not possible to change this setting Even though the ADAU1466 is flexible and can run at any sample rate up to 192 kHz the analog audio inputs and outputs on the EVAL ADAU1466Z can be distorted or silent if...

Страница 19: ...pt standard TOSLINK connectors and optical fiber cables see Figure 61 15789 056 Figure 61 TOSLINK Connector and Optical Fiber Cable for S PDIF Input and Output The ADAU1466 S PDIF receiver accepts signals with sample rates between 18 kHz and 192 kHz Because the incoming signal is asynchronous to the system sample rate an ASRC must be used to convert the sample rate of the incoming signal Optionall...

Страница 20: ...938 DAC are also accessible via the test points that are situated between the two ICs Signals can be tapped from these test points and connected to external digital audio sinks if desired see Figure 64 When connecting these signals to external devices connect at least one ground signal to maintain signal integrity 15789 059 Figure 64 Test Points for Monitoring Digital Audio Signals MULTIPURPOSE MP...

Страница 21: ...annels Channel AUXADC0 and Channel AUXADC1 are connected to linear Potentiometer R1 and Potentiometer R2 Channel AUXADC2 to Channel AUXADC5 are accessible on test points next to the ADAU1466 Inputs to the ADCs between 0 V and 3 3 V can be connected to these pads and then used in the SigmaStudio signal flow see Figure 66 15789 061 Figure 66 Potentiometers and Copper Pads for Inputting Signals to th...

Страница 22: ...f the toolbox 15789 063 Figure 68 E2Prom IC Selection in SigmaStudio 2 Connect the green input pin of the E2Prom IC to one of the available blue output pins of the USB Interface block 3 Set the communication mode to SPI 0x1 ADR0 see Figure 69 There is no physical connection between the USBi connector and the EEPROM on the EVAL ADAU1466Z SigmaStudio writes a small program to the ADAU1466 which then...

Страница 23: ...stored on the EEPROM see Figure 73 Click OK to proceed 9 SigmaStudio begins the EEPROM write operation This operation can take several minutes to complete see Figure 72 When the status window disappears the operation is complete 15789 067 Figure 72 External Memory Write Operation Status Window To execute a self boot operation take the following steps 1 Set the self boot switch S2 to enabled 2 Pres...

Страница 24: ...reset in software right click in the empty white bor der of the USB Interface block in the Hardware Configuration tab and then choose Device Enable Disable from the menu that appears see Figure 75 Performing this action once sets the system reset signal to logic low 15789 070 Figure 75 Toggling the Reset Signal in SigmaStudio STATUS LEDS Six status LEDs provide information about the state of the E...

Страница 25: ...on D1 USB connected Illuminates when the USBi is recognized by Windows after the USBi is connected to Control Port J1 and the USB 2 0 port of the computer D2 3 3 V supply status LED Illuminates when the output of the ADP3338AKCZ3 3RL or ADP3338AKCZ3 3RL7 LDO voltage regulator has reached a level sufficient to exceed the VIH logic high input level of the 74ACT04SC inverter When this LED is illumina...

Страница 26: ...te a master reset signal for the ADAU1466 and AD1938 S2 Master port mode switch This switch selects whether the master port operated in SPI mode or I2 C mode S3 Self boot MP6 MP7 and MP8 switches When in the on position Position 1 of Switch S3 asserts the SELFBOOT pin of the ADAU1466 When in the on position Position 2 of Switch S3 Position 3 of Switch S3 and Position 4 of Switch S3 tie the MP6 MP7...

Страница 27: ...MUNICATIONS HEADER S PDIF TRANSMITTER STATUS LEDs RESET CRYSTAL RESONATOR 15789 002 Figure 77 Functional Block Diagram FOUR ANALOG INPUT CHANNELS EIGHT ANALOG OUTPUT CHANNELS CONTROL PORT INTERFACE USBi ADAU1466 SIGMADSP SERIAL INPUTS MASTER PORT MODE SELECT STATUS LEDS RESET 6V DC POWER CONNECTOR S PDIF TRANSMITTER S PDIF RECEIVER DIP SWITCHES AD1938 AUDIO CODEC POTENTIOMETERS 15789 003 Figure 78...

Страница 28: ... SDATA_IN1 61 LRCLK_IN1 MP11 60 BCLK_IN1 59 SDATA_IN0 58 LRCLK_IN0 MP10 57 BCLK_IN0 56 IOVDD 55 DGND 3 VDRIVE 4 SPDIFIN 5 SPDIFOUT 6 AGND 7 AVDD 8 AUXADC0 9 AUXADC1 10 AUXADC2 11 AUXADC3 12 AUXADC4 13 AUXADC5 14 PGND 15 PVDD 16 PLLFILT 17 DGND 18 IOVDD 54 DGND 53 DVDD 52 SDATA_OUT3 51 BCLK_OUT3 50 LRCLK_OUT3 MP9 49 SDATA_OUT2 48 BCLK_OUT2 47 LRCLK_OUT2 MP8 46 MP7 45 MP6 44 SDATA_OUT1 43 BCLK_OUT1 ...

Страница 29: ..._CAS 120TA_SMD SPDT R3 4 75kΩ R35 4 75kΩ R36 100kΩ MISO_M D_3V3 D_3V3 SCLK_M MOSI_M MP1 SS_M MP0 D_3V3 Figure 80 Self Boot Circuit Schematic 15789 074 C42 0 10µF C43 0 10µF TP3 5002 TP4 5002 1 2 L2 47µH 1 2 L3 47µH 1 VOUT 2 GND 3 VCC U2 EVERLIGHT_EAPLRAA6_TOSLINKRCVR EAPLRAA6 1 GND 2 VCC 3 VIN U1 EVERLIGHT_EAPLTAA6_TOSLINKTX EAPLTAA6 R15 33 2Ω SPDIFOUT D_3V3 SPDIFIN Figure 81 S PDIF Optical Interf...

Страница 30: ...RTER 74ACT04SC 5 6 U14 C 74ACT04SC_HEXINVERTER 74ACT04SC 9 8 U14 D 74ACT04SC_HEXINVERTER 74ACT04SC 11 10 U14 E 74ACT04SC_HEXINVERTER 74ACT04SC 13 12 U14 F 74ACT04SC_HEXINVERTER 74ACT04SC C88 0 10µF D5 GREEN MP9 A_3V3 SELFBOOT RESET MP11 D_3V3 MP5 D_3V3 Figure 82 Status LEDs Schematic R90 10 0kΩ 1 2 3 4 5 6 7 8 S3 4x SPST 219 4LPST R92 10 0kΩ R95 10 0kΩ R101 10 0kΩ SELFBOOT D_3V3 MP6 MP7 MP8 15789 ...

Страница 31: ...37 AVDD 38 CM 39 ADC1LP 40 ADC1LN 41 ADC1RP 42 ADC1RN 43 ADC2LP 44 ADC2LN 45 ADC2RP 46 ADC2RN 47 LF 48 AVDD U4 AD1938 AD1938YSTZ C126 47µF C125 47µF C31 0 10µF C27 0 10µF C33 5 6nF C32 390pF R12 562Ω C26 0 10µF C25 0 10µF C29 0 10µF C30 0 10µF C23 0 10µF TP41 TP51 TP44 TP53 TP40 TP50 TP54 TP46 TP74 TP73 TP49 R8 33R2 R7 33R2 TP55 TP47 C115 10µF C24 10µF R6 0Ω R9 0Ω R10 0Ω R11 0Ω TP62 TP64 TP67 TP69...

Страница 32: ...5 5002 TP39 5002 TP7 5002 A_3V3 5V00_UNREG D_3V3 DC IN 5V TO 6V 7V DC MAX 15789 077 Figure 86 Power Supply Schematic 4 VCC 3 MR 1 GND 2 RESET U7 ADM811TARTZ REEL7 ADM811TARTZ R24 100kΩ C48 0 10µF S1 SPST NO D_3V3 RESET 1 2 3 15789 078 Figure 87 Reset Generator Circuit Schematic 15789 079 USB_CLK SCL SDA USB 5V USB CONNECTED 1 3 5 7 9 2 4 6 8 10 J1 HEADER_10 WAY_POL 2x5 R19 1kΩ D1 GREEN R17 10kΩ MI...

Страница 33: ...R65 4 99kΩ R73 4 99kΩ R81 4 99kΩ C92 330pF R72 100kΩ C98 10µF C97 100pF R67 49 9Ω R78 49 9Ω C99 100pF C103 1 0nF C95 1 0nF TP57 5002 4 8 U15 C ADA4841 2YRZ C122 0 10µF C104 0 10µF C112 0 10µF C93 0 10µF C113 10µF C116 10µF C94 10µF C102 10µF R99 100Ω R80 100Ω TP70 TP72 TP58 TP60 2 3 1 U15 A ADA4841 2YRZ 6 5 7 U15 B ADA4841 2YRZ 2 3 1 U17 A ADA4841 2YRZ 6 5 7 U17 B ADA4841 2YRZ ADC1RN ADC1RP ADC1LN...

Страница 34: ... C81 10µF C82 10µF C56 10µF C67 10µF R62 100Ω R43 100Ω TP32 TP34 TP16 TP20 2 3 1 U9 A ADA4841 2YRZ 6 5 7 U9 B ADA4841 2YRZ 6 5 7 U12 B ADA4841 2YRZ 2 3 1 U12 A ADA4841 2YRZ ADC2RN ADC2RP ADC2LN ADC2LP 5V00_UNREG OP_AMP_REF2 OP_AMP_REF2 Figure 90 Analog Input Channel 16 and Channel 17 Schematic 15789 082 OUT1R OUT1L RING SLEEVE TIP J10 SJ 3523 SMT R85 13kΩ R84 768Ω R96 768Ω R97 13kΩ C118 180pF C108...

Страница 35: ...A4841 2YRZ 6 5 7 U13 B ADA4841 2YRZ DAC2R DAC2L 5V00_UNREG 15789 083 Figure 92 Analog Output Channel 16 and Channel 17 Schematic OUT3R OUT3L RING SLEEVE TIP J6 SJ 3523 SMT R40 13kΩ R39 768Ω R52 768Ω R53 13kΩ C74 180pF C69 180pF C77 1 8nF C65 1 8nF C66 10µF C78 10µF R41 100kΩ R50 100kΩ R54 49 9Ω R37 49 9Ω 4 V 8 V U11 C ADA4841 2YRZ C70 0 10µF TP19 TP31 TP24 TP30 2 3 1 U11 A ADA4841 2YRZ 6 5 7 U11 B...

Страница 36: ...µF C53 10µF R23 100kΩ R27 100kΩ R33 49 9Ω R22 49 9Ω 4 V 8 V U8 C ADA4841 2YRZ C50 0 10µF TP5 TP14 TP6 TP15 2 3 1 U8 A ADA4841 2YRZ 6 5 7 U8 B ADA4841 2YRZ DAC4R DAC4L 5V00_UNREG Figure 94 Analog Output Channel 40 and Channel 41 Schematic C123 0 10µF C36 0 10µF C124 0 10µF C1 0 10µF C17 0 10µF C20 0 10µF C34 0 10µF C28 0 10µF D_3V3 15789 086 Figure 95 Plane Decoupling Capacitors Schematic ...

Страница 37: ...EVAL ADAU1466Z User Guide UG 1135 Rev 0 Page 37 of 45 15789 087 Figure 96 EVAL ADAU1466Z Layout Top Assembly ...

Страница 38: ...UG 1135 EVAL ADAU1466Z User Guide Rev 0 Page 38 of 45 15789 088 Figure 97 EVAL ADAU1466Z Layout Top Copper ...

Страница 39: ...EVAL ADAU1466Z User Guide UG 1135 Rev 0 Page 39 of 45 15789 089 Figure 98 EVAL ADAU1466Z Layout Ground Plane ...

Страница 40: ...UG 1135 EVAL ADAU1466Z User Guide Rev 0 Page 40 of 45 15789 090 Figure 99 EVAL ADAU1466Z Layout Power Plane ...

Страница 41: ...EVAL ADAU1466Z User Guide UG 1135 Rev 0 Page 41 of 45 15789 091 Figure 100 EVAL ADAU1466Z Layout Bottom Copper ...

Страница 42: ... CONSTRUCTION DETAIL SILKSCREEN SOLDERMASK LAMINATE 0 010 INCH THICK LAYER 2 GROUND PLANE 1 0 OZ CU CORE PREPREG 0 40 INCH THICK LAYER 3 POWER PLANE 1 0 OZ CU LAMINATE 0 010 INCH THICK LAYER 4 BOTTOM SIDE 1 5 OZ CU FINISHED SOLDERMASK SILKSCREEN LAYER 1 TOP SIDE 1 5 OZ CU FINISHED 0 05 INCHES TO 0 07 INCHES Figure 102 Cross Section of PCB Stack Up ...

Страница 43: ...ilayer ceramic capacitor 0 10 μF 35 V X7R 0402 CGA2B3X7R1V104K050BB TDK Corp 8 C46 C52 C65 C77 C85 C100 C105 C120 Multilayer ceramic capacitor 1 8 nF 25 V NP0 0402 C0402C182J3GACTU Kemet 8 C49 C51 C69 C74 C90 C96 C108 C118 Multilayer ceramic capacitor 180 pF 50 V NP0 0402 GRM1555C1H181GA01D Murata 2 C5 C33 Multilayer ceramic capacitor 5 6 nF 25 V NP0 0402 GRM155R71E562KA01D Murata 4 C54 C72 C92 C1...

Страница 44: ...thick film 0402 ERJ 2RKF1000X Panasonic 1 R5 Resistor network eight resistor isolated 33 Ω 5 63 mW 1506 741X163330JP CTS 4 R6 R9 to R11 Resistor 0 Ω 125 mW 0603 ERJ 3GEY0R00V Panasonic 6 R64 R68 to R70 R74 R79 Chip resistor 475 Ω 1 63 mW thick film 0402 RMCF0402FT475R Stackpole 4 R7 R8 R15 R46 Chip resistor 33 2 Ω 1 63 mW thick film 0402 RMCF0402FT33R2 Stackpole 1 S1 Switch top actuated tactile SP...

Страница 45: ...ny portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications...

Страница 46: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Analog Devices Inc EVAL ADAU1466Z ...

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