Analog Devices EVAL-AD5753SDZ, Руководство пользователя

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EVAL-AD5753SDZ User Guide UG-1492
Rev. 0 | Page 17 of 22
C_DCDC - SURFACE MT & THROUGH-HOLE OPTIONS
OPTION TO DRIVE VDPC- WITH AVSS (BYPASS NEGATIVE DC-DC)
OPTIONAL RC FILTER ON REFOUT
OPTION TO DRIVE VDPC+ WITH AVDD1 (BYPASS POSITIVE DC-DC)
VF = 1.8V
IF = 2MA
LPS4018-473ML
AVDD2
GND
GND
GND
0.1UF
13.7K
0.1UF
0.1UF
4.7UF
47UH
REFGND
0
RED
1K
GRN
2.2UF
RED
0.1UF
GND
GND
4.7UF
GND
47UH
GND
DNI 0.1UF
RED
DNI
2.2UF
2.2UF DNI
DNI
GND
GND GND
REFGND
AD5753BCPZ
C23
DS1
R5
C13
CLKOUT
C19
VLDO
C10
R6
L1
L2
C22
C15
U2
R8
JP5
C14 C17
C20
VDPC-
JP6
VDPC+
C21
C16 C18
AVDD2
AVDD1
/RESET
SCLK
SW-
SW+
GPIO1
GPIO2
ADC1
ADC2
GPIO0
AVDD1
REFOUT
VLDO
VDPC-
CLKOUT
VLOGIC
/FAULT
SW+
VLOGIC
SDO
/LDAC
/SYNC
AD1
ADO
AVSS
SW-
VDPC-
-VSENSE
+VSENSE
VI_OUT
VDPC+
C_HART
SDI
CCOMP
VDPC-
REFIN
A
C
1
1
13
37
32
39
24
30
1
14
23
22
8
7
16
12
11
10
6
31 40 38 33 28
4
20
19
18
17 27
PAD
15
21
9
35
29
3 2
5
25
26 34
36
2 1
1
2 1
1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
BI
OUT
PAD PG
N
D
1
VD
PC
+
AD
C
2
VIOUT
+VSENSE
CCOMP
-VSENSE
NI
C
VD
PC
-
PG
N
D
2
SW-
AVS
S
NI
C
FAULT_N
AD0
AD1
SYNC_N
SDI
SCLK CLKOUT
LDAC_N
GPIO_2
GPIO_1
GPIO_0
RESET_N
DG
N
D
SDO
V
LOGIC
VLDO
REFOUT
REFIN
CHART
RB
RA
RE
F
G
ND
AG
N
D
AD
C1
AVDD2 AVDD1
SW+
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
17
33
2-
11
9
Figure 19. AD5753 Device