System Architecture
3-2
ADSP-21262 EZ-KIT Lite Evaluation System Manual
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
The EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-21262 DSP. The DSP core is powered at 1.2V, and the IO is pow-
ered at 3.3V. Two 0-ohm resistors give access to the DSP’s power planes
and allow to measure the power consumption of the processor. The
R79
resistor provides access to the IO voltage of the processor, and the
R80
resistor provides access to the core voltage plane of the processor.
Figure 3-1. System Architecture Block Diagram
ADSP-21262
DSP
SRAM
U
S
B
C
onn
ec
to
r
EZ
U
S
B
F
X
JTAG
Header
Power Regulation
PBs (4)
JT
AG
Po
rt
A5V
+7
.5
V
C
on
nec
to
r
Expa nsion
Conn ectors
Type A
1M x 8
Flash
25 MHz
Oscillator
Parallel
Port
3.3V
Stereo Out RCA
J acks (4x2)
Stereo In RCA
Jacks (2x1)
DAI
1.2V
AD1835
CODEC
SPI
SPI FLASH
512k x 8
SRAM
CS8416
SPDIF RX
Phono
FLAG0-3
GP LEDs
(8)
2
2
Headphone
Jack
Reset PB
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