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UG-710
ADP1055-EVALZ User Guide
Rev. B | Page 20 of 43
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Figure 67. Lock Masked Commands Icon (Rightmost Icon)
ACTIVE CLAMP SNUBBER
GPIO3 and GPIO4 can be configured to have the special
function of an active clamp snubber. In this feature, GPIO3 and
GPIO4 act as PWM signals that are triggered off a reference
PWM which is either
Falling edge of SR1 and SR2 or
Falling edge of OUTC and OUTD (that is, rising edge of
OUTC and OUTD)
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Figure 68. Active Clamp Options Selected in PWM Window, Snubber Tab
The active snubber function has additional options of a
programmable on time and a delay from the reference PWM. A
complete description of the active snubber function is available
in the data sheet.
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Figure 69. Active Clamp Option in Evaluation Board
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Figure 70. Active Clamp Snubber Enabled, 20 A Load
Green Trace: Drain—Source Voltage of Low Side SR FET
Blue Trace: Gate—Source Voltage of Snubber FET
Red Trace: Drain—Source Voltage of Snubber FET
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Figure 71. Active Clamp Snubber Disabled, 20 A Load
Green Trace: Drain—Source Voltage of Low Side SR FET
Blue Trace: Gate—Source Voltage of Snubber FET
Red Trace: Drain—Source Voltage of Snubber FET
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Figure 72. Active Clamp Snubber Enabled, Zoomed In, 20 A Load
Yellow Trace: Primary Current
Blue Trace: Drain Source Voltage of Low Side SR FET