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PRELIMINARY TECHNICAL DATA

ADM1026

– 9 –

REV. PrL

PRELIMINAR

TECHNICAL

Since data can flow in only one direction as defined by
the R/

bit, it is not possible to send a command to a

slave device during a read operation. Before doing a
read operation, it may first be necessary to do a write
operation to tell the slave what sort of read operation to
expect and/or the address from which data is to be read.

3. When all data bytes have been read or written, stop con-

ditions are established. In WRITE mode, the master
will pull the data line high during the 10th clock pulse
to assert a STOP condition. In READ mode, the mas-
ter device will release the SDA line during the low pe-
riod before the 9th clock pulse, but the slave device will
not pull it low. This is known as No Acknowledge. The
master will then take the data line low during the low
period before the 10th clock pulse, then high during the
10th clock pulse to assert a STOP condition.

Note:

If it is required to perform several read or write operations
in succession, the master can send a repeat start condition
instead of a stop condition to begin a new operation.

SMBUS PROTOCOLS FOR RAM AND EEPROM

The ADM1026 contains volatile registers (RAM) and
non-volatile EEPROM. RAM occupies address locations
from 00h to 6Fh, whilst EEPROM occupies addresses
from 8000h to 9FFFh.

Data can be written to and read from both RAM and
EEPROM as single data bytes and as block (sequential)
read or write operations of 32 data bytes, which is the
maximum block size allowed by the SMBus specification.

Data can only be written to unprogrammed EEPROM lo-
cations. To write new data to a programmed location it is
first necessary to erase it. EEPROM erasure cannot be
done at the byte level, the EEPROM is arranged as 128
pages of 64 bytes, and an entire page must be erased.

The EEPROM has three RAM registers associated with it,
EEPROM Registers 1, 2 and 3 at addresses 06h, 0Ch and
13h. EEPROM Registers 1 and 2 are for factory use only.
EEPROM Register 3 is used to set up the EEPROM op-
erating mode.

Setting bit 0 of EEPROM Register 3 puts the EEPROM

into Read Mode. Setting bit 1 puts it into Programming
Mode. Setting Bit 2 puts it into Erase Mode.

One, and only one of these bits must be set before the
EEPROM may be accessed, Setting no bit or more than
one of them will cause the device to respond with No Ac-
knowledge if an EEPROM read, program or erase opera-
tion is attempted.

It is important to distinguish between SMBus write opera-
tions such as sending an address or command, and
EEPROM programming operations. It is possible write an
EEPROM address over the SMBus whatever the state of
EEPROM register 3. However, EEPROM Register 3
must be correctly set before a subsequent EEPROM op-
eration can be performed. For example, when reading
from the EEPROM, bit 0 of EEPROM Register 3 can be
set, even though SMBus write operations are required to
set up the EEPROM address for reading.

Bit 3 of EEPROM Register 3 is used for EEPROM write
protection. Setting this bit will prevent accidental pro-
gramming or erasure of the EEPROM. If a an EEPROM
write or erase operation is attempted with this bit set, the
ADM1026 will respond with No Acknowledge. This bit is
write once and can only be cleared by power-on reset.

EEPROM Register bit 7 is used for clock extend. Pro-
gramming an EEPROM byte takes approximately 250µs,
which would limit the SMBus clock for repeated or block
write operations. Setting bit 7 of EEPROM register 3 en-
ables the SMBus clock extend function. This allows the
ADM1026 to pull SCL low and extend the clock pulse
when it cannot accept any more data.

R / W

S C L

S D A

D 7

D 6

D 5

D 4

D 3

D 2

D 1

D 0

ACK. BY