PRELIMINARY TECHNICAL DATA
ADM1026
– 1 7 –
REV. PrL
PRELIMINAR
Y
TECHNICAL
DA
TA
ANALOG MONITORING CYCLE TIME
The analog monitoring cycle begins when a one is written to
the Start Bit (bit 0), and a zero to the
INT
_Clear Bit (bit 2)
of the Configuration Register.
INT
_Enable (Bit 1) should
be set to one to enable the
INT
output. The ADC measures
each analog input in turn, starting with remote temperature
channel 1 and ending with local temperature. As each mea-
surement is completed the result is automatically stored in
the appropriate value register. This "round-robin" monitor-
ing cycle continues until it is disabled by writing a 0 to bit 0
of the Configuration Register.
As the ADC will normally be left to free-run in this man-
ner, the time taken to monitor all the analog inputs will
normally not be of interest, as the most recently measured
value of any input can be read out at any time.
For applications where the monitoring cycle time is im-
portant, it can easily be calculated.
The total number of channels measured is:
5 dedicated supply voltage inputs
10 general purpose analog inputs
3.3V
MAIN
3.3V
STBY
Local temperature
2 remote temperature
Pins 28 and 27 are measured both as analog inputs AIN8/
AIN9 and as remote temperature input D2+/D2-, irre-
spective of which configuration is selected for these pins.
If pins 28 and 27 are configured as AIN8/AIN9, the mea-
surements for these channels are stored in registers 27h and
29h and the invalid temperature measurement is discarded.
On the other hand, if pins 28 and 27 are configured as
D2+/D2-, the temperature measurement is stored in regis-
ter 29h and there will be no valid result in register 27h.
As mentioned previously, the ADC performs a conversion
every 711µs on the analog and local temperature inputs and
every 2.13ms on the remote temperature inputs. Each input
is measured 16 times and averaged to reduce noise.
The total monitoring cycle time for voltage and tempera-
ture inputs is therefore nominally:
(18
⫻
16
⫻
0.711) + (2
⫻
16
⫻
2.13) = 273ms
The ADC uses the internal 22.5kHz clock, which has a
tolerance of ±6%, so the worst case monitoring cycle time
is 290ms.
The fan speed measurement uses a completely separate
monitoring loop, as described later.
INPUT SAFETY
Scaling of the analog inputs is performed on chip, so ex-
ternal attenuators are normally not required. However,
since the power supply voltages will appear directly at the
pins, its is advisable to add small external resistors in se-
ries with the supply traces to the chip to prevent damaging
the traces or power supplies should a accidental short such
as a probe connect two power supplies together.
As the resistors will form part of the input attenuators,
they will affect the accuracy of the analog measurement if
their value is too high. The analog input channels are cali-
brated assuming an external series resistor of 500
⍀
, and
the accuracy will remain within specification for any value
from zero to 1k
⍀
, so a standard 510
⍀
resistor is suitable.
The worst such accident would be connecting -12V to
+12V - a total of 24V difference, with the series resistors
this would draw a maximum current of approx. 24mA.
REFERENCE OUTPUT
The ADM1026 has a buffered reference voltage output
(pin 24), which can be programmed to 1.82V or 2.5V by
clearing or setting bit 2 of Configuration Register 3 (ad-
dress 07h).
ANALOG OUTPUT
The ADM1026 has a single analog output from a un-
signed 8 bit DAC which produces 0 - 2.5V (independent
of the reference voltage setting). The input data for this
DAC is contained in the FAN 1 Speed register (address
04h) The Fan 1 Speed Register defaults to FFh during
power-on reset, which produces maximum fan speed. The
analog output may be amplified and buffered with exter-
nal circuitry such as an op-amp and transistor to provide
fan speed control. During automatic fan speed control, de-
scribed later, the four MSBs of this register set the mini-
mum fan speed.
Suitable fan drive circuits are given in Figures 10a to 10f.
When using any of these circuits, the following points
should be noted:
1. All of these circuits will provide an output range from
zero to 12V, apart from figure 10a which loses
the base-emitter voltage drop of Q1 due to the emitter-
follower configuration.
2. To amplify the 2.5V range of the analog output up to
12V, the gain of these circuits needs to be around 4.8.
3. Care must be taken when choosing the op-amp to en-
sure that its input common-mode range and output
voltage swing are suitable.
4. The op-amp may be powered from the +12V rail alone
or from ±12V. If it is powered from +12V then the in-
put common-mode range should include ground to ac-
commodate the minimum output voltage of the DAC,
and the output voltage should swing below 0.6V to en-
sure that the transistor can be turned fully off.
5. If the op-amp is powered from -12V then precautions
such as a clamp diode to ground may be needed to pre-
vent the base-emitter junction of the output transistor
being reverse-biased in the unlikely event that the out-
put of the op-amp should swing negative for any rea-
son.
6. In all these circuits, the output transistor must have an
I
CMAX
greater than the maximum fan current, and be ca-
pable of dissipating power due to the voltage dropped
across it when the fan is not operating at full-speed.
7. If the fan motor produces a large back e.m.f when
switched off, it may be necessary to add clamp diodes
to protect the output transistors in the event that the
output goes from full-scale to zero very quickly.
