AD1849K
REV. 0
–15–
Data Byte 6, Output Setting Register 2
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
ADI
SM
RO5
RO4
RO3
RO2
RO1
RO0
23
22
21
20
19
18
17
16
ADI
ADC Invalid. This bit is set to “1” during the autocalibration sequence, indicating that the serial data output from the
ADCs is meaningless.
SM
Mono Speaker Analog Mute:
0
Mute mono speaker
1
Mono speaker on
RO5:0
Output attenuation setting for the right DAC channel; “0” represents no attenuation. Step size is 1.5 dB; “62”
represents 93 dB of attenuation. Attenuation = 1.5 dB
×
RO, except for RO = “63,” which represents full digital mute.
Data Byte 7, Input Setting Register 1
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
PIO1
PIO0
OVR
IS
LG3
LG2
LG1
LG0
15
14
13
12
11
10
9
8
PIO1:0
Parallel I/O bits for system signaling. PIO bits do not affect Codec operation.
OVR
ADC input overrange. This bit is set to “1” if either ADC channel is driven beyond the specified input range. It is
“sticky,” i.e., it remains set until explicitly cleared by writing a “0” to OVR. A “1” written to OVR is ignored,
allowing OVR to remain “0” until an overrange condition occurs.
IS
Input selection:
0
Line-level stereo inputs
1
Microphone (condenser-type) level inputs if MB = 0 (+20 dB gain), or line-level stereo inputs if MB = 1
(0 dB gain).
LG3:0
Input gain for left channel. “0” represents no gain. Step size is 1.5 dB; “15” repr22.5 dB of input gain.
Gain = 1.5 dB
×
LG.
Data Byte 8, Input Setting Register 2
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
MA3
MA2
MA1
MA0
RG3
RG2
RG1
RG0
7
6
5
4
3
2
1
0
MA3:0
Monitor mix. “0” represents no attenuation, i.e., the ADCs’ output is fully mixed with the DACs’ input. Step size
is 6 dB; “14” represents an attenuation of both channels of the ADCs’ output along the monitor datapath of
84 dB. Mix attenuation = 6 dB
×
MA, except for MA = “15,” which disables monitor mix entirely.
RG3:0
Input gain for right channel. “0” represents no gain. Step size is 1.5 dB; “15” repr22.5 dB of input gain.
Gain = 1.5 dB
×
RG.
