AD1849K
REV. 0
–13–
Control Byte 4, Test Register
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
0
0
0
0
0
0
ENL
ADL
39
38
37
36
35
34
33
32
ENL
Enable loopback testing:
0
Disabled
1
Enabled
ADL
Loopback mode:
0
Digital loopback from Data/Control receive to Data/Control transmit (D-D)
1
Analog loopback from DACs to ADCs (D-A-D)
Control Byte 5, Parallel Port Register
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
PIO1
PIO0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
PIO1:0 Parallel I/O bits for system signaling. PIO bits do not affect Codec operation.
Control Byte 6, Reserved Register
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
Reserved bits should be written as 0.
Control Byte 7, Revision Register
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
0
0
1
0
REVID3
REVID2
REVID1
REVID0
15
14
13
12
11
10
9
8
REVID3:0
Silicon revision identification. Reads greater than or equal to 0010 (i.e., 0010, 0011, etc.) for the AD1849K.
Control Byte 8, Reserved Register
Data 7
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1
Data 0
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
Reserved bits should be written as 0.