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Interfaces
Version 0.5
AMIMON Confidential
17
3.2.1.1 Timing Diagram
E
D
G
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0
E
D
G
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1
Figure 4: Timing Diagram
3.3 Audio Data Capture
AMN12310 audio processing logic block receives the audio stream from the WHDI wireless link and regenerates
the appropriate clock and data. If the transmitter end was configured to SPDIF audio interface, then the audio is
output on the receiver side through the SPDIF. The same is true for the I
2
S interface.
No constraints exist for a coherent video and audio clock, where
coherent
means that the audio and the video
clock must have been created from the same clock source. The AMN12310 supports two-channel audio-sampling
frequencies of up to 48 KHz, 32 bits per sample.
Содержание AMN12310 WHDI
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