AMIMON AMN12310 WHDI, Техническое описание

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Interfaces
Version 0.5
AMIMON Confidential 16
Common Video Output Format
Table 2 lists the common supported video output resolutions.
Table 2: Common Supported Video Input Resolutions
Input Pixel Clock (MHz)
Color Space Video Format
Bus
Width
480i 480p XGA 720p 1080i
RGB/YCbCr 4:4:4 24 27 27 65 74.25 74.25
Video Channel Mapping
The 30 bit video output signals are mapped to the RGB and YCbCr color space according to the options
described in the following table:
Table 3: Video Channel Mapping
Option D[29:20] D[19:10] D[9:0]
#1 RED (Cr) GREEN (Y) BLUE (Cb)
#2 RED (Cr) BLUE (Cb) GREEN (Y)
#3 GREEN (Y) RED (Cr) BLUE (Cb)
#4 GREEN (Y) BLUE (Cb) RED (Cr)
#5 BLUE (Cb) RED (Cr) GREEN (Y)
#6 BLUE (Cb) GREEN (Y) RED (Cr)
The AMN123100 allows any of the output video channels options. The first option is the default from power-up. In
order to change the video channel mapping, refer to the appropriate programmer's reference guide.
3.2 Video Interface Output Timing Diagram
3.2.1 Timing Requirements
Important: The following parameters relate to the AMN2210 baseband chipset and not to the entire AMN12310
board.
Table 4: Video Interface
Symbol Parameter MIN TYP MAX Units
TDCKCYC DCLK period 12.5 40 Ns
TDCKFREQ DCLK frequency 25* 80 MHz
TDCKDUTY DCLK duty cycle 40% 60% Ns
TDCKPDR
Propagation delay after
D
CLK rising edge
1.0 4.0 Ns
TDCKPDF Propagation delay after D CLK falling edge 1.0 4.0 Ns
* It is possible to support lower clock frequency using an external PLL for video clock generation.