American Megatrends 64 Series, Руководство пользователя

Страница: 9 / 104

American Megatrends 80486 Baby EISA Motherboard User's Guide
3
Description,
Continued
Cache Memory
The Baby EISA motherboard supports 64 KB or 256 KB direct mapped, write-
back external (secondary) cache memory. The Intel 80486 processors have
8 KB of internal cache memory.
Eight 8 KB x 8 or 32 KB x 8 15 ns SRAM chips are used for cache memory.
Tag memory is 15 ns 16 KB x 4 SRAM chips.
System BIOS and video BIOS can be cached via the Cacheable RAM Area
option in ADVANCED CMOS SETUP.
All system memory can be cached. Up to three non-cacheable areas from 64
KB – 512 KB can be defined via AMIBIOS ADVANCED CHIPSET SETUP.
The cache read and write has 0 wait states (1 wait state is used for
write operations if a 50 or 66 MHz microprocessor is installed). Burst
mode is supported. Cache memory is enabled and disabled via the keyboard
or a hardware turbo switch. The hardware turbo switch can be enabled or
disabled via ADVANCED CMOS SETUP. The keychords that control cache
memory are:
<Ctrl><Alt><Shift><+> enables internal and external (secondary) cache memory
<Ctrl><Alt><Shift><-> disables internal and external (secondary) cache memory.
System Memory
The Baby EISA motherboard supports up to 128 MB of DRAM onboard system
memory using eight 16 MB x 9 SIMMs. The Baby EISA motherboard has two
banks (with four sockets each) of SIMM sockets. Up to 4 GB of system
memory is supported on the EISA bus.