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General Information
Displays the MAX V version and current temperature of the FPGA and the board.
Reset
Clears the graph, resets the minimum and maximu values and restarts the Power
Monitor.
6.3.11. Clock Controller
The Clock Controller application sets the Si5338 programmable oscillators to any
frequency between 0.16 MHz and 710 MHz.
The Clock Controller application sets the Si5341 programmable oscillators to any
frequency between 0.1 MHz and 712.5 MHz.
The Clock Control communicates with the MAX V on the board through the JTAG bus.
The programmable oscillator are connected to the MAX V device through a 2-wire
serial bus.
Figure 31.
Clock Controller - Si5338
6. Board Test System
UG-20046 | 2018.07.20
Intel
®
Stratix
®
10 GX FPGA Development Kit User Guide
88