17
EVA-X4300 System Design Guide
Chapter 2
Layout
Guide
3.
Supported DDR2 Devices:
4.
In order to meet the maximum interface speed (200 MHz/400 Mbps), memory
device drive strength should be set 100% strength. This requires the series ter-
minations to avoid excessive Under/Over-shoot.
We highly recommend
reserve terminations for ALL high speed signals. It is much easier to
remove terminations than adding them after the PCB has been found to
fail EMI.
5.
It is critical that all signal routing layers have a ground reference plane, meaning
that there is a full, contiguous ground plane next to every DDR2 routing layers.
The purpose is to provide a path for return currents to minimize crosstalk and
EMI.
6.
The DDR2 devices should be placed as close to EVA-X4300 as possible. The
distance between DDR2 devices and EVA-X4300 should less than
3
inches.
7.
Other devices should be kept away to ensure other signals do not interfere with
the DDR2 interface.
8.
The 1.8V power partial plane (island) should encompass at least the entire
DDR2 region.
9.
All signals avoid crossing over an unrelated plane or different power plane. Six
or more layers of PCB could eliminate these problems by routing DDR2 signals
in the layer that is adjacent to the ground plane(s).
10.
Rout traces with minimal layer transitions and minimize the total number of turns
and vias.
11.
Decoupling capacitors are critical to the reliable operation of the DDR2 inter-
face. The decoupling capacitors should be
0402
size or smaller.
12.
Bulk capacitors ensure that a sufficient amount of DC voltage and current is
available for DDR2 devices. At least one bulk capacitor should be located for
each DDR2 device.
13.
DO NOT share the vias for decoupling capacitors, due to the inductance of the
vias.
14.
To minimize inductance, power vias should be as large as possible, but take
good care of the inadvertently cut of the ground and power planes.
15.
The PLL and DLL power supply pins draw small currents, but they are noise
sensitive. Each supply should be filtered by
π
-filter
networks. Use Ferrite Bead,
NOT inductor.
MCLK
6700.98
/MCLK
6678.9
/RAS
11307.98
/WE
10909.61
Vendor
Part Number
Note
Hynix
HY5PS121621C
84-ball
Hynix
HY5PS12821C
60-ball
SiS
DDRII6408-5C
60-ball
Elpida
EDE1108ABSE
68-ball
Содержание EVA-X4300
Страница 1: ...User Manual EVA X4300 System Design Guide ...
Страница 4: ...EVA X4300 System Design Guide iv ...
Страница 5: ...Chapter 1 1 Overview ...
Страница 7: ...Chapter 2 2 Layout Guide ...
Страница 10: ...EVA X4300 System Design Guide 6 2 2 Package Outline ...
Страница 11: ...7 EVA X4300 System Design Guide Chapter 2 Layout Guide ...
Страница 32: ...EVA X4300 System Design Guide 28 ...
Страница 33: ...Appendix A A References ...
Страница 35: ...31 EVA X4300 System Design Guide Appendix A References ...