cExpress-KL
Specifications
7
2.17. Functional Diagram
AB
GbE
7
th
Generation
Intel® Core®/Celeron®
Processor
SoC
(code name “Kaby Lake
‐
U”)
CD
SODIMM
4
‐
16 GB DDR4
non
‐
ECC
DDI1
(4 lanes)
DP/HDMI
4x PCIe x1 Gen3
(port 0
‐
3) (support x2, x4)
HD Audio
3x SATA 6Gb/s (port 0/1)
8x USB 2.0/1.0
(ports 0
‐
7)
XDP
60
DDI2
(4 lanes)
DP/HDMI
4x USB 3.0 upgrade
(port 0
‐
3)
Single/dual channel
18/24
‐
bit LVDS
UART0, UART1
eDP
LM73
GPIO
PCA9535
GP I
2
C
SPI 0
BIOS
LPC bus
SPI
SPI 1
BIOS
DDC I
2
C
SPI_CS#
SODIMM
4
‐
16 GB DDR4
non
‐
ECC
eDP 4 lanes (build option)
1x PCIe x1 Gen3
(port 4)
SMBus
SMBus
1x PCIe x1 Gen3
(port 5, build option)
LPC
to
UART
New
SEMA
BMC
TPM
2.0
4x GPO, 4x GPI
DDI1
(4 lane
s)
DP/e
DP/TMDS
VGA
DP to VGA
(build option)
I
2
C
LVDS
eDP to LVDS
Figure 1: cExpress-KL Functional Block Diagram
Содержание cExpress-KL
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