cExpress-KL
Pinouts and Signal Descriptions
13
3.3. AB Signal Descriptions
3.3.1. Audio
Signals
Signal
Pin
Description
I/O
PU/PD
Comment
AC_RST# /
HDA_RST#
A30
Reset output to codec, active low.
O 3.3VSB
AC_SYNC /
HDA_SYNC
A29
Sample-synchronization signal to the
codec(s).
O 3.3V
AC_BITCLK /
HDA_BITCLK
A32
Serial data clock generated by the
external codec(s).
I/O 3.3V
AC _SDOUT /
HDA_SDOUT
A33
Serial TDM data output to the codec.
O 3.3V
AC _SDIN[2:0]
HDA_SDIN[2:0]
B28
B29
B30
Serial TDM data inputs from up to 3
codecs.
I/O
3.3VSB
No AC/HDA_SDIN 2
(B28) support on this
platform
3.3.2.
Analog VGA (build option)
Signal
Pin
Description
I/O
PU/PD
Comment
VGA_RED B89
Red for monitor.
Analog DAC output, designed to drive a
37.5-Ohm equivalent load.
O Analog PD
150R
build option support
VGA_GRN B91
Green for monitor
Analog DAC output, designed to drive a
37.5-Ohm equivalent load.
O Analog PD
150R
build option support
VGA_BLU B92
Blue for monitor.
Analog DAC output, designed to drive a
37.5-Ohm equivalent load.
O Analog PD
150R
build option support
VGA_HSYNC
B93
Horizontal sync output to VGA monitor
O 3.3V
build option support
VGA_VSYNC
B94
Vertical sync output to VGA monitor
O 3.3V
build option support
VGA_I2C_CK B95 DDC clock line (I²C port dedicated to
identify VGA monitor capabilities)
I/O OD
3.3V
PU 2K2
3.3V
build option support
VGA_I2C_DAT B96
DDC data line.
I/O OD
3.3V
PU 2K2
3.3V
build option support
Содержание cExpress-KL
Страница 8: ...2 Introduction This page intentionally left blank...
Страница 42: ...36 Connector Pinouts on Module This page intentionally left blank...
Страница 46: ...40 Smart Embedded Management Agent SEMA This page intentionally left blank...
Страница 90: ...84 BIOS Checkpoints Beep Codes This page intentionally left blank...