18
PowerLab Owner’s Guide
digital converter). The ADC can sample at a maximum rate of 100,000
samples per second. The sampling process is handled independently
of the processor core through a sampling control engine using direct
memory access. The CPU assembles groups of samples into blocks
and then transmits them to the computer, where the software
receives, records, and displays the data.
The external trigger input (marked ‘Trigger’ on the front panel)
allows either a voltage level or a contact closure to trigger recording.
Figure A–1
Block diagram of the
PowerLab 2/20.
PPC403 CPU
16-bit ADC
16-bit DAC
RANGE
CONTROL
Switching
Power
Supply
IEC Mains
Input
USB Port
C
o
m
p
ar
at
o
r
F
LAS
H
ROM
1M
x
16 D
RA
M
System
Glue
Chip
+1
–1
2 Differential Input
Amplifiers
Mu
lti
Po
rt
PO
D I C
±5
V
U
SB
C
on
tr
olle
r
1M
x
16 D
RA
M
30 MHz
XTAL
Serial Port
I C Port
MULTIPLEXER
2
2
REAR
PANEL
FRONT
PANEL
Analog Inputs
Analog Output
External Trigger Input
Input 1
Input 2
+
–
Содержание PowerLab 2/20
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