Actel IGLOO PLUS Starter Kit, Руководство пользователя, Страница: 21 / 62

JTAG Pins
IGLOO PLUS Starter Kit User’s Guide 21
JTAG Pins
The AGLP125-CSG289 has advanced I/O features such as JTAG pins for IEEE 1149.1 JTAG Boundary Scan Test.
These pins are utilized during programming of the FPGA (
Figure 2-6 ). Low-power flash devices have a separate bank
for these dedicated JTAG pins. The JTAG pins can be run at any voltage from 1.5 V to 3.3 V (nominal). V
CC
must also
be powered for the JTAG state machine to operate, even if the device is in bypass mode; V
JTAG
alone is insufficient.
Both V
JTAG
and V
CC
to the part must be supplied to allow JTAG signals to transition the device. Isolating the JTAG
power supply in a separate I/O bank gives greater flexibility in supply selection and simplifies power supply and PCB
design. If the JTAG interface is neither used or planned for use, the V
JTAG
pin together with the TRST pin could be
tied to GND.
VJTAG is the ability to switch between 3.3 V and 1.5 V / 1.2 V source using jumper J21. Four-pin headers could be used
for current measurement of the V
JTAG
and V
PUMP
rails.
Figure 2-6 · JTAG Pins
V3P3
1V5_1V2
V3P3
VJTAG [6]
VPUMP [6]
VJTAG [6]
VPUMP [6]
TDI [6]
TCK [6]
TRST [6]
TMS [6]
TDO [6]
R48 39 R48 39
1 2 3 4
J20
HDR_4PIN J20
HDR_4PIN
TCK
U16
TDI
T16
TMS
R16
TRST
R17
VJTAG
P17
TDO
T17
VPUMP
U17
SEC 6/6
AGLP125 CSG289
JTAG
U5F
SEC 6/6
JTAG
U5F
AGLP125-CSG289
1
2
3
J21
HDR_3PIN
J21
HDR_3PIN
1 2 3 4
J22
HDR_4PIN J22
HDR_4PIN
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