SERIES PMC408 PCI MEZZANINE CARD 32-CHANNEL DIGITAL I/O MODULE
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Register will have no effect if the Change-of-State (COS) interrupt
type is configured by the Interrupt Type Configuration Register.
INTERRUPT POLARITY (HIGH/LOW) REGISTER:
MSB _ _ _ _ _ _ _ _ _ _ _ _ _ _ LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
X X X X X X X X CH7....................................CH0
The unused upper 8 bits of these 16-bit registers are “Don’t
Care” and will always read high (1’s). All bits are set to “0” following
a reset which means that the inputs will cause interrupts when they
are below TTL threshold.
Interrupt Status Register (R/W)
The Interrupt Status Register reflects the status of the 8
possible interrupt channels (channels 0-7 only). A “1” bit indicates
that an interrupt is pending for the corresponding channel. A
channel that does not have interrupts enabled will never set its
interrupt status flag. A channel’s interrupt can be cleared by writing
a “1” to its bit position in the Interrupt Status Register (writing a “1”
acts as a reset signal to clear the set state). However, if the
condition which caused the interrupt to occur remains, the interrupt
will be generated again (unless disabled via the Interrupt Enable
Register).
Note that the input channel bandwidth should be limited to
reduce the possibility of missing channel interrupts. For a specific
input channel, this could happen if multiple changes occur before
the channel’s interrupt is serviced.
INTERRUPT STATUS REGISTER:
MSB _ _ _ _ _ _ _ _ _ _ _ _ _ _ LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
X X X X X X X X CH7....................................CH0
All interrupts are cleared following a reset.
PMC408 PROGRAMMING CONSIDERATIONS
To make programming and communicating with the board
easier, Acromag provides a software product (sold separately)
consisting of PMC module VxWorks
®
libraries. This software
(Model PMCSW-API-VXW, MSDOS format) is composed of
VxWorks
®
(real time operating system) libraries for all Acromag
PMC modules. The software is implemented as a library of “C”
functions which link with existing user code to make possible simple
control of all Acromag PMC modules.
Acromag, also provides a software product (sold separately)
consisting of PMC module ActiveX (Object Linking and Embedding)
controls for Windows 98, 95
®
, ME, 2000 and Windows NT
®
compatible application programs (Model PMCSW- ATX, MSDOS
format) to program and communicate with the board.
The following sections give some pointers for programming
interrupts.
Programming Interrupts
Digital input channels can be programmed to generate interrupts
for the following conditions (channels 0-7 only):
•
Change-of-State (COS) at selected channels.
•
Input level (polarity) match at selected input channels.
Interrupts generated by the PMC408 use interrupt request line
INTA#. The interrupt release mechanism employed is the Release
On Register Access (RORA) type. This means that the interrupter
will release the interrupt request line (INTA#) after the interrupt has
been cleared by writing a “1” to the appropriate bit position in the
input channel Interrupt Status Register.
When using interrupts, input channel bandwidth should be
limited to reduce the possiblity of missing channel interrupts. For a
given input channel, this could happen if multiple changes occur
before the channel’s interrupt is serviced. The response time of the
input channels should also be considered when figuring this
bandwidth. The total response time is the sum of the input buffer
response time, plus the interrupt logic circuit response time, and this
time must pass before another interrupt condition will be recognized.
PMC Programming Example for Change-of-State Interrupts:
1. Enable PMC408 board interrupt by writing a “1” to bit 0 of the
Interrupt Register at Base A 000H.
2. Select channel Change-of-State interrupts by writing a “1” to
each channel’s respective bit in the Interrupt Type Register at
Base A 214H. Note that Change-Of-State interrupts
(specified with “1”) may be mixed with polarity match interrupts
(specified with “0”).
3. Enable individual input channel interrupts by writing a “1” to
each channel’s respective bit in the Interrupt Enable Register at
Base A 210H.
4. Clear pending interrupts by writing a “1” to each channel’s
respective bit in the Interrupt Status Register at Base Address
+ 21CH.
Change-of-State Interrupts may now be generated by the input
channels programmed above for any Change-Of-State
transition.
PMC Programming Example for Level (Polarity) Match
Interrupts:
1. Enable PMC408 board interrupt by writing a “1” to bit 0 of the
Interrupt Register at Base A 000H.
2. Select channel polarity match interrupts by writing a “0” to each
channel’s respective bit in the Interrupt Type Register at Base
A 214H. Note that Change-Of-State interrupts
(specified with “1”) may be mixed with polarity match interrupts
(specified with “0”).
3. Select the desired polarity (High/Low) level for interrupts by
writing a “0” (Low), or “1” (High) level to each channel’s
respective bit in the Interrupt Polarity Registers at Base Address
+ 218H.
4. Enable individual input channel interrupts by writing a “1” to
each channel’s respective bit in the Interrupt Enable Registers
at Base A 210H.
5. Clear pending interrupts by writing a “1” to each channel’s
respective bit in the Interrupt Status Register at Base Address
+ 21CH.
Interrupts can now be generated by matching the input level with
the selected polarity for programmed interrupt channels.
General Sequence of Events for Processing an Interrupt
1.
The PMC408 asserts the Interrupt Request Line (INTA#) in
response to an interrupt condition.
