SERIES PMC408 PCI MEZZANINE CARD 32-CHANNEL DIGITAL I/O MODULE
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Electric Fast Transient
Immunity (EFT)……………..…..
Complies with IEC1000-4-4 Level
2 (0.5KV at field input and output
terminals) and European Norm
EN50082-1.
Radiated Emissions ………....... Meets or exceeds European Norm
EN50081-1 for class A equipment.
Warning: This is a class A product. In a domestic environment
this product may cause radio interference in which the
user may be required to take adequate measures.
Reliability Prediction
Mean Time Between Failure…... MTBF = TBD hours (not available
at time of printing) @ 25
°
C,
Using MIL-HDBK-217F, Notice 2.
DIGITAL INPUTS
Input Channel Configuration.........32 non-inverting buffered inputs
with a common connection. For
DC voltage applications only,
observe proper polarity.
Input Signal Voltage Range...........0 to +60V DC, Maximum.
Input Signal Threshold..................TTL compatible. 1.5V DC with
200mV of hysteresis, typical.
Thus, Low-to-High threshold is
1.6VDC, High-to-Low is 1.4VDC,
typical. Limited to TTL levels of
0.8VDC (Max LOW level) and
2.0VDC (Min HIGH level).
Input Resistance...........................100K
Ω
, Typical.
Input Hysteresis............................200mVDC centered at a 1.5VDC
threshold, Typical.
Input Current.................................560uA, Typical at 60VDC.
Interrupt Input Response Time......250nS minimum to 375nS
maximum, depending on when
the input transition occurs with
respect to the 8MHz clock.
Measured from input transition to
INTA# line assertion.
DIGITAL OUTPUTS
Output Channel Configuration.......32 open-drain DMOS Mosfets
with common source connection.
For DC voltage applications only,
observe proper polarity.
Output “OFF” Voltage Range.........0 to +60V DC, Maximum.
Output “OFF” Leakage Current......25uA Maximum (Mosfet Only,
55
°
C, 48V). Does not include
tandem input bias current.
NOTE: The 100K
Ω
input buffer
resistors in combination with
+4.7V voltage clamps will tend to
increase the off-state drain
current with increased drain
voltage (up to 0.5mA at 60V).
This is due to the fact that the
input buffer circuitry and output
mosfet drain circuitry are
connected in tandem to the same
I/O pin.
Output “ON” Current Range...........0 to +1A DC, continuous (up to
10A total for all channels
combined), or 300mA DC,
continuous (all channels ON).
No deration required at elevated
ambients.
Output R
ds
ON Resistance.............0.2
Ω
, Maximum (25
°
C).
Turn-ON Time................................Varies with load, 620ns Typical,
with 330
Ω
pull-up to +5V and
12-inch ribbon cable. Measured
from FRAME# line assertion to
output drain state transfer to TTL
0.8V level.
Turn-OFF Time..............................Varies with load, 800ns Typical,
with 330
Ω
pull-up to +5V and
12-inch ribbon cable. Measured
from FRAME# line assertion to
output drain state transfer to TTL
2.0V level.
OUTPUT MOSFETS
(These specifications are included for reference and apply to
the output driver only. See DIGITAL OUTPUTS above for
module specifications).
Manufacturer/Part Number............National NDS9945,
Siliconix Si9945DY.
Voltage V
DSS
..................................60V DC, Maximum.
Current I
D
.......................................3.5A, Continuous (25
°
C),
2.8A, Continuous (70
°
C).
ON Resistance R
DS
.......................0.2
Ω
(VGS=4.5V, 25
°
C).
Power Dissipation P
D
....................2W (25
°
C).
Output “OFF” Leakage Current....25uA Maximum (55
°
C, 48V).
PCI Local Bus Interface
Compatibility......................…..... Conforms to PCI Local Bus
Specification, Revision 2.2 and
PMC Specification, P1386.1/Draft
2.4. (See Note 2)
Electrical/Mechanical Interface... Single-Width PMC Module.
PCI Target ……………………… Implemented by Altera FPGA.
4K Memory Space Required…… One Base Address Register.
PCI commands Supported…….. Configuration Read/Write,
Memory Read/Write, 32,16, and 8-
bit data transfer types supported.
Signaling………………………… 5V Compliant, 3.3V Tolerant
PCI bus Write Cycle Time
1
…… 150 nS Typical measured from
falling edge of FRAME# to the
falling edge of TRDY#.
PCI bus Read Cycle Time
1
…… 150 nS Typical.
Notes (PCI Local Bus Interface):
1.
Although the typical read or write PCI bus cycle time is only
150nS the actual read or write implemented on the PMC
Module will be typically 1000 nS. Thus, the PMC Module will
issue a RETRY when a new read or write cycle is implemented
before the PMC modules 1000 nS read or write has completed.
When the PMC Module issues a RETRY this frees the PCI
bus while the previous read or write operation is completed.
2.
Due to the unique modular nature of the PMC408 assembly, it
is impossible to comply with the solder side component height
per the PMC Mechanical Standand. Refer to Mechanical
