SERIES IOS-440 I/O SERVER MODULE 32-CHANNEL ISOLATED DIGITAL INPUT MODULE
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connection with each other. Isolation is provided between ports
and between each port and the IOS logic. This includes the I/O
Server. With respect to interrupt generation and events, event
polarities may be defined as positive (low-to-high), or negative
(high-to-low) for individual nibbles (groups of 4 input lines, or half
ports). Change-of-State detection would require 2 input
channels--one detecting positive events, one detecting negative
events.
P2 pinouts are arranged to be compatible with similar
industry models. This model is directly loopback compatible with
the Acromag Model IOS-445 Digital Output Module. Likewise,
pin assignments are identical to those of Acromag Model IOS-
400 40-Channel Digital Input Boards for channels 0-31.
See IOS-445/IOS-440 LOOPBACK CONNECTIONS for
loopback connections to Acromag Model IOS-445 Output
Modules.
Note that the inputs of this device are bipolar, and may be
connected in any direction with respect to the port common.
Further, do not confuse port commons with signal ground. For
the IOS-440, port common only infers that this lead is connected
common to the 8 inputs of the port (a separate port common for
each port). Likewise, the port commons of the IOS-440 input
module and IOS-445 output module are normally not connected
together for loopback interconnection (see IOS-445/IOS-440
LOOPBACK CONNECTIONS).
Noise and Grounding Considerations
Input lines of the IOS-440 are optically isolated between the
logic and field input connections. Likewise, separate port
commons facilitate port-to-port isolation. Consequently, the field
I/O connections are isolated from the carrier board and
backplane, thus minimizing the negative effects of ground
bounce, impedance drops, and switching transients. However,
care should be taken in designing installations to avoid
inadvertent isolation bridges, noise pickup, isolation voltage
clearance violations, equipment failure, or ground loops.
3.0 PROGRAMMING INFORMATION
ADDRESS MAPS
This board is addressable in the IOS I/O space to control the
configuration and status monitoring of 32 digital input or event
channels.
This board operates in two modes: Standard Mode and
Enhanced Mode. Standard Mode provides digital input voltage
monitoring of 32 isolated signal lines. In Standard Mode, each
input line is configured as a simple input without interrupts. Data
is read from (or written to) one of eight groups (ports) as
designated by the address and read and write signals. Enhanced
Mode includes the same functionality of Standard Mode, but adds
access to 32 additional event sense inputs connected to each
input point of ports 0-3. Individual inputs also include selectable
hardware debounce in Enhanced Mode. For event sensing, the
Enhanced Mode allows a specific input level transition (High-to-
Low, Low-to-High, or Change-of-State) to be detected and
optionally generate an interrupt.
Memory is organized and addressed in separate banks of
eight registers or ports (eight ports to a bank). The Standard
Mode of operation addresses the first group of 8 registers or ports
(ports 0-3 for reading inputs, Ports 4, 5, & 6 which are not used
on this model, and Port 7 which is the Mask Register). If the
Enhanced Mode is selected, then 3 additional banks of 8
registers are accessed to cover the additional functionality in this
mode (events, interrupts, and debounce). The first bank of the
Enhanced Mode (bank 0) is similar in operation to the Standard
Mode. The second bank (bank 1) provides event sense and
interrupt control. The third bank is used to configure the
debounce circuitry to be applied to input channels in the
Enhanced Mode. Two additional mode-independent registers are
provided to enable the interrupt request line, generate a software
reset, and store the interrupt vector.
The I/O space may be as large as 64, 16-bit words (128
bytes) using address lines A1..A6, but the IOS-440 uses only a
portion of this space. The I/O space address map for the IOS-
440 is shown in Table 3.1. Note the base address for the IOS
module I/O space (see your carrier board instructions) must be
added to the addresses shown to properly access the I/O space.
All accesses are performed on an 8-bit byte basis (D0..D7).
Note that some functions share the same register address.
For these items, the address lines are used along with the read
and write signals to determine the function required.
Standard (Default) Mode Memory Map
Table 3.1A shows the memory map for the Standard Mode of
operation. This is the Default mode reached after power-up or
system reset. Standard Mode provides simple monitoring of 32
digital input lines without interrupts. Data is read from or written
to one of eight groups (ports) as designated by the address and
read and write signals.
To switch to Enhanced Mode, four unique bytes must be
written to port 7, in consecutive order, without doing any reads or
writes to any other port and with interrupts disabled. The data
pattern to be written is 07H, 0DH, 06H, and 12H, and this must
be written after reset or power-up.
Enhanced Mode Memory Maps
Table 3.1B shows the memory maps used for the Enhanced
Mode of operation. Enhanced Mode includes the same
functionality of Standard Mode, but allows each input port‟s event
sense input and debounce logic to be enabled.
In Enhanced Mode, a memory map is given for each of 3
memory banks. The first memory bank (bank 0) has the same
functionality as the Standard Mode. Additionally, its port 7
register is used to select which bank to access (similar to
Standard Mode where port 7 was used to select the Enhanced
Mode). Bank 1 provides read/write access to the 32 event sense
inputs. Bank 2 provides access to the registers used to control
the debounce circuitry of these event sense inputs.
