INDUSTRIAL I/O PACK SERIES AVME9675 VME64x 6U CARRIER BOARD
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addressing requires the use of a VME64x backplane or a
proprietary design which provides the same capability.
The combination of geographical addressing and the
AVME9675 Configuration ROM (CR) board identification values
allow system software to automatically identify into which VME64x
backplane slot the AVME9675 is plugged. With the CR/CSR BAR
defined by geographical addressing, the AVME9675 CR and CSR
registers can then be addressed by system software to define a
base address for the AVME9675 carrier and IP module registers.
CONFIGURATION ROM (CR) ASSIGNMENTS
Table 3.1 defines the CR address space from 0x0 through
0xFFF. The addresses within the CR are given as offset addresses.
They are relative to the CR/CSR BAR (given by geographical
addressing). An absolute address in the CR is created, by adding
the offset address to the CR/CSR BAR. The CR area is “read-only”
and cannot be changed by system software. Access to the CR is
compatible with the D16 or D08(0) access method and utilizes only
every fourth byte. All unimplemented locations in the defined CR
Area will be read as 0x0.
Table 3.1: CONFIGURATION ROM (CR) Memory Map
CR Offset Address
[MSB ………LSB]
Content
Description
ROM Data
[MSB …LSB]
1 byte
0x03
Checksum
0xAD
3 bytes
0x07,0x0B,0x0F
Length of ROM
0xFFF
1 byte
0x13
Configuration ROM
data access width:
Use D16 or D08(EO),
every fourth byte
0x83
1 byte
0x17
CSR Data access width
Use D16 or D08(EO),
every fourth byte
0x83
1 byte
0x1B
CR/CSR Space
Specification ID
Specifies the VME64x
CR/CSR version
0x02
1 byte
0x1F
ASCII “C”
Used to identify a valid
CR
0x43
1 byte
0x23
ASCII “R”
Used to identify a valid
CR
0x52
3 bytes
0x27, 0x2B, 0x2F
Manufacturer’s ID
assigned by IEEE
0x00,01,C3
4 bytes
0x33,0x37,0x3B,0x3F
AVME9675 Board ID
supplied by Acromag
0x00,00,00,01
4 bytes
0x43,0x47,0x4B,0x4F
AVME9675 Revision ID
supplied by Acromag
0x00,…,00
3 bytes
0x53, 0x57 ,0x5B
Pointer to a null
terminated ASCII
printable string or
0x000000
0x00,00,00
8 bytes
0x5F to 0x7B
RESERVED
0x00,…,00
1 byte
0x7F
Program ID code
0x00
24 bytes
0x83 to 0xDF
Unimplemented
0x00,…,00
CR Offset Address
[MSB ………LSB]
Content
Description
ROM Data
[MSB …LSB]
1 byte
0xE3
Slave Characteristics
Parameter:
Supports Read-Modify-
Write (RMW) and
Implements a P2
connector
0x44
4 bytes
0xE7 to 0xF3
Unimplemented
0x00
1 byte
0xF7
Interrupt Capabilities
Interrupt Levels 7 to 1
can be selected
0xFE
2 bytes
0xFB, 0xFF
Unimplemented
0x00,00
1 byte
0x103
Function 0 Data Access
Width (DAWPR)
Supports Data transfer
access width of
D16 or D08(EO)
0x83
7 bytes
0x107 to 0x11F
Unimplemented
0x00,…,00
8 bytes
0x123 to 0x13F
Function 0 AM Code
Mask (AMCAP)
Supports Address
Modifers
45 (0x2D), and
41 (0x29)
0x00,00,22,00,
00,00,00,00
312 bytes
0x143 to 0x61F
Unimplemented
0x00,…,00
4 bytes
0x623 to 0x62F
Function 0 Address
Decoder Mask (ADEM)
Address bits A15 to
A10 are decoded for
access of the
AVME9675 carrier and
IP module registers
(that is, a 1Kbyte
address space size is
specified).
0x00,00,FC,00
627 bytes
0x633 to 0xFFF
Unimplemented or
Reserved
0x00,…,00
The mapping of the AVME9675 carrier and IP module registers
into 1KB of A16/D16 or D08(EO) short I/O space is selected by the
Function 0 address relocation CR values as described in this
paragraph. The Function 0 Data Access Width (DAWPR) specifies
support for data transfer access widths of D16 or D08(EO). Bits 15
to 10 of the Address DEcoder Mask (ADEM) are set and indicate
that address bits A15, A14, A13, A12, A11, and A10 are compared
for decoding purposes. This corresponds with the support of A16
short I/O space addressing as selected in the Function 0 AM Code
Mask (AMCAP). The values read from the DAWPR, ADEM, and
AMCAP are fixed and are not programmable.
CONTROL/STATUS REGISTER (CSR) ASSIGNMENTS
The AVME9675 CSR is used to store the CR/CSR BAR and
the CSR Function 0 Address DEcoder CompaRe (ADER) register.
As indicated above, the CR/CSR BAR contains the base address for
the CR/CSR space registers (as defined by geographical
addressing). The CSR Function 0 ADER register is set by system
software with the base address of the AVME9675 carrier and IP
module registers. Once the CSR Function 0 ADER register has
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