INDUSTRIAL I/O PACK SERIES AVME9675 VME64x 6U CARRIER BOARD
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Table 2.1: Geographical Address Pin Assignments
Slot
No.
GAP*
Pin
GA4*
Pin
GA3*
Pin
GA2*
Pin
GA1*
Pin
GA0*
Pin
1
Open
Open
Open
Open
Open
GND
2
Open
Open
Open
Open
GND
Open
3
GND
Open
Open
Open
GND
GND
4
Open
Open
Open
GND
Open
Open
5
GND
Open
Open
GND
Open
GND
6
GND
Open
Open
GND
GND
Open
7
Open
Open
Open
GND
GND
GND
8
Open
Open
GND
Open
Open
Open
9
GND
Open
GND
Open
Open
GND
10
GND
Open
GND
Open
GND
Open
11
Open
Open
GND
Open
GND
GND
12
GND
Open
GND
GND
Open
Open
13
Open
Open
GND
GND
Open
GND
14
Open
Open
GND
GND
GND
Open
15
GND
Open
GND
GND
GND
GND
16
Open
GND
Open
Open
Open
Open
17
GND
GND
Open
Open
Open
GND
18
GND
GND
Open
Open
GND
Open
19
Open
GND
Open
Open
GND
GND
20
GND
GND
Open
GND
Open
Open
21
Open
GND
Open
GND
Open
GND
The AVME9675 board has pull-up resistors tied to each of the
six geographic address inputs, so that their state (Open = “high” or
GND = “low”) can be interpreted by logic on the carrier board. This
logic uses the geographic addressing inputs to encode the base
address of the CR/CSR space into the CR/CSR Base Address
Register (BAR). The host computer can locate the AVME9675 by
scanning the A24 CR/CSR space using address modifier 2FH (refer
to section 3 for CR/CSR space programming details).
Once located, additional characteristics of the AVME9675 may
be read from the Configuration ROM (CR) portion of the space.
Following power up, accesses to the card’s Short I/O (A16) space
are disabled. The base address of the carrier in the Short I/O space
and the desired address modifier must be programmed using the
Function 0 Address DEcoder CompaRe (ADER) Register in the
Control/Status Register (CSR) portion of the CR/CSR space. Then,
accesses to the Short I/O space can be enabled by writing to the Bit
Set Register in the CSR. Each carrier board implements a 1K byte
block of addresses in the Short I/O space.
•
Consult your host CPU manual for detailed information about
addressing the VME64x bus short I/O (A16, 16-bit) space. In
many cases, CPU's utilizing 24-bit addressing will start the 16-
bit address at FF0000 (Hex), and 32-bit CPU's at FFFF0000
(Hex).
VME64x bus Address Modifiers
No hardware jumper configuration is needed. The carrier board
initially responds to address modifier 2FH in the standard (A24)
CR/CSR space.
Following configuration within the CR/CSR space the carrier
board will respond to either address modifier 29H or 2DH in the
VME64x bus Short (A16) I/O space. This means that both short
supervisory and short non-privileged accesses are supported.
The carrier board will also respond to both address modifiers
39H and 3DH in the VME64x bus standard (A24) address space,
when standard address space accesses to IP memory are enabled
via programmable registers on the carrier board (refer to Section 3
for programming details).
Interrupt Configuration
No hardware jumper configuration is required. All interrupt
enabling, status, and VME64x bus interrupt level selections are
configured via programmable registers on the carrier board (see
Section 3 for programming details). The carrier board passes
interrupt requests from the IP modules to the VME64x bus -- It does
not originate interrupt requests. Refer to the IP modules for their
specific configuration requirements.
CONNECTORS
Carrier Field I/O Connectors (IP modules A through D)
Field I/O connections are made through the rear via transition
module (TRANS-200) connectors A-D for IP modules in positions A-
D, respectively. IP module assignment is marked on the transition
module for easy identification (see IP location drawing 4501-800 for
physical locations of the IP modules). SCSI-2 Round cable
assemblies and Acromag termination panels (or user defined
terminations) can be quickly mated to the transition module
connectors. Pin assignments are defined by the IP I/O Mapping to
VME64x Standard (ANSI/VITA 4.1-1996).
Connectors A-D are 50-pin SCSI-2 right angle (female)
connectors (AMP). Connectors are high-density, and there is one
connector for each IP module marked with A-D on the transition
module panel. These connectors include spring latch hardware and
30 microns of gold in the mating area for excellent connection.
The TRANS-200 was originally designed for use with the
AVME9670 product which supports four IP modules A-D. It also
may be used for the four IP slot AVME9675-4 or the two slot
AVME9675-2.
IP Field I/O Connectors (IP modules A through D)
The field side connectors of IP modules A-D mate to connectors
P3, P5, P7 and P9, respectively, on the carrier board. IP location is
silk-screened on the board for easy identification. Field and logic
side connectors are keyed to avoid incorrect assembly.
P3, P5, P7, and P9 are 50-pin male plug header connectors.
These AMP 173280-3 connectors mate to AMP 173279-3
connectors (or similar) on the IP modules. This provides excellent
connection integrity and utilizes gold plating in the mating area.
Threaded metric M2 screws and spacers (supplied with Acromag IP
modules) provide additional stability for harsh environments (see
Drawing 4501-801 for assembly details).
Pin assignments for these connectors are made by the specific
IP model used and correspond identically to the pin numbers of the
transition module panel connectors.
IP Logic Interface Connectors (IP modules A through D)
The logic interface sides of IP modules A-D mate to connectors
P4, P6, P8, and P10, respectively, on the carrier board. IP location
is silk-screened on the board for easy identification. Field and logic
side connectors are keyed to avoid incorrect assembly.
P4, P6, P8, and P10 are 50-pin male plug header connectors.
These AMP 173280-3 connectors mate to AMP 173279-3
connectors (or similar) on the IP modules. This provides excellent
connection integrity and utilizes gold plating in the mating area.
Threaded metric M2 screws and spacers (supplied with Acromag IP
modules) provide additional stability for harsh environments (see
Drawing 4501-801 for assembly details).
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