Abit VL6, Руководство пользователя

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Introduction of the BIOS 3-17
User’s Manual
Video RAM Cacheable:
Two options are available: Disabled or Enabled. The default setting is Disabled . When you
select Enabled, you get faster video RAM executing speed via the L2 cache. You must check
your VGA adapter manual to find out if any compatibility problems will occur.
AGP Aperture Size:
Six options are available: 16M ' 32M ' 64M ' 128M ' 256M ' Back to 16M. The
default setting is 64M . This option specifies the amount of system memory that can be used
by the AGP device. The aperture is a portion of the PCI memory address range dedicated for
graphics memory address space. Host cycles that hit the aperture range are forwarded to the
AGP without any translation. See
www.agpforum.org for AGP information.
AGP-2X Mode:
Two options are available: Disabled or Enabled. The default setting is Enabled . If you use
the older AGP adapter that does not support AGP 2X mode, you need to set this item to
Disabled.
CPU to PCI Write Buffer:
Two options are available: Disabled or Enabled. The default setting is Enabled . When
enabled, up to four words of data can be written to the PCI bus without interrupting the CPU.
When disabled, a write buffer is not used and the CPU read cycle will not be completed until
the PCI bus signals that it is ready to receive the data. Because the CPU speed running faster
than PCI bus, the CPU must wait as the PCI bus receives data before starting each write
cycle.
PCI Dynamic Bursting:
Two options are available: Disabled or Enabled. The default setting is Enabled . When
Enabled , every write transaction goes to the write buffer. Burstable transactions then burst
on the PCI bus and nonburstable transactions don’t. Which means, when you set to disabled,
if the write transaction is a burst transaction, the information go to the write buffer and burst
transfers are perform on the PCI bus later. If the transaction is not a burst transaction, PCI
write will occur immediately. (it will active after a write buffer flush)
PCI Master 0 WS Write:
Two options are available: Disabled or Enabled. The default setting is Enabled . When
Enabled, writes to the PCI bus are executed with zero wait states (immediately), when PCI
bus is ready to receive data. If disabled , the system will wait one state before data is written
to the PCI bus.
PCI Delay Transaction:
Two options are available: Disabled or Enabled. The default setting is Enabled . The chipset
has an embedded 32-bit posted write buffer to support delay transactions cycles. Select
Enabled to support compliance with PCI specification version 2.1.